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IS62LV12816ALL Dataheets PDF



Part Number IS62LV12816ALL
Manufacturers ISSI
Logo ISSI
Description 128K X 16 CMOS Static RAM
Datasheet IS62LV12816ALL DatasheetIS62LV12816ALL Datasheet (PDF)

www.DataSheet4U.com IS62LV12816ALL 128K x 16 CMOS STATIC RAM FEATURES • High-speed access time: 55, 70, 100 ns • CMOS low power operation – 120 mW (typical) operating – 6 µW (typical) CMOS standby • TTL compatible interface levels • Single 2.5V (min.) to 3.45V (max.) power supply • Fully static operation: no clock or refresh required • Three state outputs • Data control for upper and lower bytes • Industrial temperature available • Available in the 44-pin TSOP (Type II) and 48-pin mini BGA (6mm.

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www.DataSheet4U.com IS62LV12816ALL 128K x 16 CMOS STATIC RAM FEATURES • High-speed access time: 55, 70, 100 ns • CMOS low power operation – 120 mW (typical) operating – 6 µW (typical) CMOS standby • TTL compatible interface levels • Single 2.5V (min.) to 3.45V (max.) power supply • Fully static operation: no clock or refresh required • Three state outputs • Data control for upper and lower bytes • Industrial temperature available • Available in the 44-pin TSOP (Type II) and 48-pin mini BGA (6mm x 8mm) ISSI DESCRIPTION ® MARCH 2001 The ISSI IS62LV12816ALL is a high-speed, 2,097,152-bit static RAM organized as 131,072 words by 16 bits. It is fabricated using ISSI 's high-performance CMOS technology. This highly reliable process coupled with innovative circuit design techniques, yields high-performance and low power consumption devices. When CE is HIGH (deselected), the device assumes a standby mode at which the power dissipation can be reduced down with CMOS input levels. Easy memory expansion is provided by using Chip Enable and Output Enable inputs, CE and OE. The active LOW Write Enable (WE) controls both writing and reading of the memory. A data byte allows Upper Byte (UB) and Lower Byte (LB) access. The IS62LV12816ALL is packaged in the JEDEC standard 44-pin TSOP (Type II) and 48-pin mini BGA. (6mm x 8mm) FUNCTIONAL BLOCK DIAGRAM A0-A16 DECODER 128K x 16 MEMORY ARRAY VCC GND I/O0-I/O7 Lower Byte I/O8-I/O15 Upper Byte I/O DATA CIRCUIT COLUMN I/O CE OE WE UB LB ISSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any errors which may appear in this publication. © Copyright 2001, Integrated Silicon Solution, Inc. CONTROL CIRCUIT Integrated Silicon Solution, Inc. — 1-800-379-4774 Rev. A 04/17/01 1 www.DataSheet4U.com IS62LV12816ALL PIN CONFIGURATIONS 44-Pin TSOP (Type II) A4 A3 A2 A1 A0 CE I/O0 I/O1 I/O2 I/O3 Vcc GND I/O4 I/O5 I/O6 I/O7 WE A16 A15 A14 A13 A12 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 A5 A6 A7 OE UB LB I/O15 I/O14 I/O13 I/O12 GND Vcc I/O11 I/O10 I/O9 I/O8 NC A8 A9 A10 A11 NC ISSI 48-Pin mini BGA 1 2 3 4 5 6 ® A B C D E F G H LB I/O8 I/O9 GND Vcc I/O14 I/O15 NC OE UB I/O10 I/O11 I/O12 I/O13 NC A8 A0 A3 A5 NC NC A14 A12 A9 A1 A4 A6 A7 A16 A15 A13 A10 A2 CE I/O1 I/O3 I/O4 I/O5 WE A11 N/C I/O0 I/O2 Vcc GND I/O6 I/O7 NC PIN DESCRIPTIONS A0-A16 I/O0-I/O15 CE OE WE Address Inputs Data Inputs/Outputs Chip Enable Input Output Enable Input Write Enable Input LB UB NC Vcc GND Lower-byte Control (I/O0-I/O7) Upper-byte Control (I/O8-I/O15) No Connection Power Ground TRUTH TABLE Mode Not Selected Output Disabled Read WE X H X H H H L L L CE H L L L L L L L L OE X H X L L L X X X LB X X H L H L L H L UB X X H H L L H L L I/O PIN I/O0-I/O7 I/O8-I/O15 High-Z High-Z High-Z DOUT High-Z DOUT DIN High-Z DIN High-Z High-Z.


IS62LV12816L IS62LV12816ALL NG5N


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