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ST
ST3010
Audio Decoder/Encoder
Notice: Sitronix Technology Corp. reserves the right to change the contents in this document without prior notice. This is not a final specification. Some parameters are subject to change.
1. FEATURES
24-bit DSP based voice/audio processor Operation voltage – Core logic: 2.25V~2.7V – I/O pads: 3.0V~3.6V Voltage regulator for core logic Low Voltage Reset (LVR) _ 2.5V low voltage reset One PLL to generate high system frequency from a 3MHz source _ 12M~30MHz PLL output Tow clock sources _ Crystal...........................................................3MHz _ External input...……………………………......3MHz Low power down current _Typical current: 3uA One 16-bit programmable Timer One clocking output One external interrupt _ Edge/level trigger supported One 16-bit direct-drive DAC – Maximum current: 145mA MCU interfaces _ Parallel mode Two Serial PORT interfaces(SP) _ Programmable data length from 8-bit to 16-bit _ I2S, Left/Right Justified interfaces to external DAC/ADC Function List _LBRC playback (1.2Kbps, 1.6Kbps, 2.4Kbps for 8KHz) (1.6Kbps, 2.2Kbps, 3.3Kbps for 11KHz) 1. AB-Repeat 2. Time stretch (speed up x2, speed down x2) 3. Combine syllable _Audio Playback (CBR, VBR-- all bit rate) 1. Forward/Backward play , AB-Repeat 2. Encryption 3. Spectrum gain 4. Time stretch (speed up x1.5, speed down x1.5) 5. Combine syllable _Wav Playback 1. Forward/Backward play, AB-Repeat _Wav Record {MS-ADPCM(3.8:1)} 1. Software AGC
2. GENERAL DESCRIPTION
The ST3010 is a highly integrated and cost-effective 24-bit DSP based audio processor for various consumer applications. It consists of one powerful DSP for advanced voice decoder and encoder algorithms of natural speech with less memory. It provides low bit rate compression (LBRC) for voice playback and audio playback. System clock comes from 3MHz crystal or external input. ST3010 has 32 I/Os and these can be either GPIO or functional pins. Each pin can be programmed to input or output.
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One external interrupt pin can be requested by external devices. One internal 16-bit DAC can provide significant volume equipping with internal amplifier. For particular application or recorder, two general audio interfaces are supported to interface with external DAC/ADC. Audio interface can be configured to I2S or Left/Right Justified compatible mode. There are serial and parallel interfaces for various connections with different MCUs.
2007-06-14
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ST3010
2.1 Block Diagram
Figure 2-1
ST3010 Block Diagram
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ST3010
3. SIGNAL DESCRIPTIONS
Table 3-1
Function Group
Signal Function Description
Pin Name RESET PWD PWDA OSCXI OSXO ECLK CMODE[1:0] TEST[2:0] SO[1:0]/ DPA[7,15] CLKO/ DPA[6] DAP[13,14], DPB[0:15] XREQ/DPA[5] TF0/DPA[0] RF0/DPA[1] TX0/DPA[2] RX0/DPA[3] SCLK0/DPA[4] TF1/DPA[8] RF1/DPA[9] TX1/DPA[10] RX1/DPA[11] SCLK1/DPA[12] D[0]/SCL D[1]/SDI D[2]/SDO D[3:7] WR RD CS CMD REQ RDY PMODE
Pin # 1 1 1 1 1 1 2 3 2 1 18 1 1 1 1 1 1 1 1 1 1 1 1 1 1 5 1 1 1 1 1 1 1
I/O I I O I O I I I O O I/O I O I O I O O I O I O I/O I/O I/O I/O I I I I O O I
Description System reset, low active Power down, low active Power down acknowledge, high active Crystal input or R-oscillator input Crystal output External clock input Clock source select 01=Crystal 1X=ECLK Test mode SO0/DPA[7], SO1/DPA[15] Clock output/DPA[6] General I/O External interrupt/DPA[5] Transmit frame synchronization/DPA[0] Receive frame synchronization/DPA[1] Serial data transmit/DPA[2] Serial data receive/DPA[3] Serial clock/DPA[4] Transmit frame synchronization/DPA[8] Receive frame synchronization/DPA[9] Serial data transmit/DPA[10] Serial data receive/DPA[11] Serial clock/DPA[12] Parallel : Data bus Parallel : Data bus Parallel : Data bus Parallel : Data bus Parallel : Write enable, low active Parallel : Read enable, low active Parallel : Chip select, low active Parallel : Command/data select “H”: Data “L”: Command DSP wants to sent command to MCU, low active DSP permit MCU access data, low active Parallel interface select 0: Standard parallel (default) 1: Special parallel
System control
Special I/O
GPIO External Interrupt
Serial Port0/ DPA[4:0]
Serial Port1/ DPA[12:8]
MCU Interface
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ST3010
P/S VDD25 VSS25 VDD33 VSS33 REGVDD33 REGVSS33 PLLVDD25 PLLVSS25 PLLVDD25A PLLVSS25A DACVDD33A DACVSS33A DACOVDD33A DACOVSS33A VCCOUT VREF DACO DACOB VCM 1 2 2 2 2 1 1 1 1 1 1 1 1 2 2 1 1 2 2 1 I I I I I I I I I I I I I I I O O O O O Parallel/serial interface select 0: Serial 1: Parallel 2.5V power 2.5V power ground 3.3V power 3.3V power ground Digital power input of regulator Digital power ground of regulator Digital power input of PLL Digital power ground of PLL Analog power input of PLL Analog power ground of PLL Analog power input of DAC Analog power ground of DAC Analog power input of DAC output stage Analog power ground of DAC output stage 2.5V output of regulato.