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5236QSCX Dataheets PDF



Part Number 5236QSCX
Manufacturers Fairchild Semiconductor
Logo Fairchild Semiconductor
Description FAN5236QSCX
Datasheet 5236QSCX Datasheet5236QSCX Datasheet (PDF)

www.DataSheet4U.com www.fairchildsemi.com FAN5236 Dual Mobile-Friendly DDR / Dual-output PWM Controller Features • Highly flexible dual synchronous switching PWM controller includes modes for: – DDR mode with in-phase operation for reduced channel interference – 90˚ phase shifted two-stage DDR Mode for reduced input ripple – Dual Independent regulators 180° phase shifted • Complete DDR Memory power solution – VTT Tracks VDDQ/2 – VDDQ/2 Buffered Reference Output • Lossless current sensing on lo.

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www.DataSheet4U.com www.fairchildsemi.com FAN5236 Dual Mobile-Friendly DDR / Dual-output PWM Controller Features • Highly flexible dual synchronous switching PWM controller includes modes for: – DDR mode with in-phase operation for reduced channel interference – 90˚ phase shifted two-stage DDR Mode for reduced input ripple – Dual Independent regulators 180° phase shifted • Complete DDR Memory power solution – VTT Tracks VDDQ/2 – VDDQ/2 Buffered Reference Output • Lossless current sensing on low-side MOSFET or precision over-current using sense resistor • VCC Under-voltage Lockout • Converters can operate from +5V or 3.3V or Battery power input (5 to 24V) • Excellent dynamic response with Voltage Feed-Forward and Average Current Mode control • Power-Good Signal • Also supports DDR-II and HSTL • Light load Hysteretic mode maximizes efficiency • QSOP28, TSSOP28 General Description The FAN5236 PWM controller provides high efficiency and regulation for two output voltages adjustable in the range from 0.9V to 5.5V that are required to power I/O, chip-sets, and memory banks in high-performance notebook computers, PDAs and Internet appliances. Synchronous rectification and hysteretic operation at light loads contribute to a high efficiency over a wide range of loads. The hysteretic mode of operation can be disabled separately on each PWM converter if PWM mode is desired for all load levels. Efficiency is even further enhanced by using MOSFET’s RDS(ON) as a current sense component. Feed-forward ramp modulation, average current mode control scheme, and internal feedback compensation provide fast response to load transients. Out-of-phase operation with 180 degree phase shift reduces input current ripple. The controller can be transformed into a complete DDR memory power supply solution by activating a designated pin. In DDR mode of operation one of the channels tracks the output voltage of another channel and provides output current sink and source capability — features essential for proper powering of DDR chips. The buffered reference voltage required by this type of memory is also provided. The FAN5236 monitors these outputs and generates separate PGx (power good) signals when the soft-start is completed and the output is within ±10% of its set point. A built-in over-voltage protection prevents the output voltage from going above 120% of the set point. Normal operation is automatically restored when the over-voltage conditions go away. Under-voltage protection latches the chip off when either output drops below 75% of its set value after the softstart sequence for this output is completed. An adjustable over-current function monitors the output current by sensing the voltage drop across the lower MOSFET. If precision current-sensing is required, an external current-sense resistor may optionally be used. Applications • • • • DDR VDDQ and VTT voltage generation Mobile PC dual regulator Server DDR power Hand-Held PC power REV. 1.1.7 4/4/03 www.DataSheet4U.com PRODUCT SPECIFICATION FAN5236 Generic Block Diagrams +5 VCC FAN5236 VIN (BATTERY) = 5 to 24V Q1 ILIM1 L OUT1 VOUT1 = 2.5V COUT1 PWM 1 Q2 DDR Q3 ILIM2/ REF2 L OUT2 VOUT2 = 1.8V COUT2 PWM 2 Q4 Figure 1. Dual output regulator +5 VCC FAN5236 VIN (BATTERY) = 5 to 24V Q1 ILIM1 L OUT1 VDDQ = 2.5V COUT1 R PWM 1 Q2 +5 DDR Q3 R VTT = VDDQ/2 COUT2 PG2/REF 1.25V L OUT2 Q4 PWM 2 ILIM2/REF2 Figure 2. Complete DDR Memory Power Supply 2 REV. 1.1.7 4/4/03 www.DataSheet4U.com FAN5236 PRODUCT SPECIFICATION Pin Configurations AGND LDRV1 PGND1 SW1 HDRV1 BOOT1 ISNS1 EN1 FPWM1 VSEN1 ILIM1 SS1 DDR VIN 1 2 3 4 5 6 28 27 26 25 24 23 VCC LDRV2 PGND2 SW2 HDRV2 BOOT2 ISNS2 EN2 FPWM2 VSEN2 ILIM2/REF2 SS2 PG2/REF2OUT PG1 7 22 FAN5236 8 21 9 10 11 12 13 14 20 19 18 17 16 15 QSOP-28 or TSSOP-28 θJA = 90°C/W Pin Definitions Pin Number 1 2 27 3 26 4 25 5 24 6 23 7 22 8 21 9 20 Pin Name AGND LDRV1 LDRV2 PGND1 PGND2 SW1 SW2 HDRV1 BOOT1 BOOT2 ISNS1 ISNS2 EN1 EN2 FPWM1 FPWM2 Pin Function Description Analog Ground. This is the signal ground reference for the IC. All voltage levels are measured with respect to this pin. Low-Side Drive. The low-side (lower) MOSFET driver output. Connect to gate of low-side MOSFET. Power Ground. The return for the low-side MOSFET driver. Connect to source of lowside MOSFET. Switching node. Return for the high-side MOSFET driver and a current sense input. Connect to source of high-side MOSFET and low-side MOSFET drain. High-Side Drive. High-side (upper) MOSFET driver output. Connect to gate of high-side MOSFET. BOOT. Positive supply for the upper MOSFET driver. Connect as shown in Figure 3. Current Sense input. Monitors the voltage drop across the lower MOSFET or external sense resistor for current feedback. Enable. Enables operation when pulled to logic high. Toggling EN will also reset the regulator after a latched fault condition. These are CMOS inputs whose state is indeterminate if left open. Forced PWM mode. When logic low, inhibits t.


F9418AGC 5236QSCX SCB2673


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