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M32186F8VFP Dataheets PDF



Part Number M32186F8VFP
Manufacturers Renesas
Logo Renesas
Description single-chip RISC microcomputer
Datasheet M32186F8VFP DatasheetM32186F8VFP Datasheet (PDF)

www.DataSheet4U.com 32186 Group 32-BIT RISC MICROCOMPUTER REJ03B0116-0100Z Rev.1.00 Dec 01, 2004 Description The 32186 Group is a 32-bit single-chip RISC microcomputer with built-in flash memory. To accomplish highprecision arithmetic operations, it incorporates a fully IEEE754 compliant, single-precision FPU. This microcomputer contains a variety of peripheral functions. With the software necessary to run these peripheral functions stored in its large-capacity flash memory, this microcompute.

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www.DataSheet4U.com 32186 Group 32-BIT RISC MICROCOMPUTER REJ03B0116-0100Z Rev.1.00 Dec 01, 2004 Description The 32186 Group is a 32-bit single-chip RISC microcomputer with built-in flash memory. To accomplish highprecision arithmetic operations, it incorporates a fully IEEE754 compliant, single-precision FPU. This microcomputer contains a variety of peripheral functions. With the software necessary to run these peripheral functions stored in its large-capacity flash memory, this microcomputer meets the needs of application systems for high functionality, high-performance arithmetic capability, and sophisticated control, thereby adaptation to the embedded applications can be easily configured. Table 1.0.1 Type name M32186F8VFP Product List ROM capacity 1 Mbytes RAM capacity 64 Kbytes Power supply voltage Frequency 80MHz at singlesupply 5V or 3.3V at doublesupplies 5V, 3.3V Temperature range (Note 1) -40°C to +125°C Note 1: This does not guarantee continuous operation and there is a limitation on the length of use (temperature profile). Features • CPU .............................. M32R-FPU core (M32R Family common instruction set + single-precision FPU / bit manipulation instructions) • Pipeline structure ............................................................................................................................. 6-stage structure • Instruction set .................................................................................... 100 discrete instructions / 6 addressing modes • Instruction format ............................................................................................................................. 6 bit/32-bit length • Built-in multiplier-accumulator (DSP function instructions) • Minimum instruction execution time ....................................................... 12.5ns (at f(CPUCLK) = 80 MHz operation) • Built-in flash memory • Built-in RAM • Virtual-flash emulation function .................................................................................................. 8 Kbytes x 8 blocks • Interrupt controller .............................................................................................. 41 interrupt sources, 8 priority levels • Wait controller ........................................... can be extended 0-15 wait cycles and external signal for each of 4 areas • I/O port .......................................................................................................... 97 ports (selectable from 3 input levels) • External interrupt input pin ............................................................................................................................... 27 pins • DMAC ...................................................................................................................................................... 10 channels • Multijunction timers (MJT) ........................................................................................................................ 55 channels • A/D converter ................................................................................. 16 channels 10-bit converter (sample & hold x 2) • Serial interface ............................ 4 channels (clock synchronous/asynchronous), 2 channels (clock synchronous) • CAN (CAN Specification 2.0B active) ...................................................... 2 channels, each having 32 message slots • Direct RAM Interface (DRI) • Real-time debugger (RTD) • Non-Break Debug (NBD) • JTAG (boundary scan function) • Debug interface common to the M32R Family (SDI: Scalable Debug Interface) • Package ......................................................................................................................... 144 pin LQFP (0.5mm pitch) Applications Automobile equipment control (e.g., Engine, ABS, AT, CCD, and Radar sensing applications), industrial equipment system control, and high-function OA equipment (e.g., PPC) Since this group is under development, its specifications are subject to change. Rev.1.00 Dec 01, 2004 REJ03B0116-0100Z Page 1 of 46 www.DataSheet4U.com 32186 Group 1.1 Outline of the 32186 Group 1.1 1.1.1 (1) Outline of the 32186 Group M32R Family CPU Core with Built-in FPU (M32R-FPU) Based on a RISC architecture • The 32186 group (hereafter simply the 32186) is a 32-bit RISC single-chip microcomputer. The M32RFPU incorporates a fully IEEE 754-compliant, single-precision FPU in order to materialize the common instruction set and the high-precision arithmetic operation of the M32R CPU. The 32186 products are built around the M32R-FPU and incorporates flash memory, RAM and various peripheral functions, all integrated into a single chip. • The M32R-FPU is constructed based on a RISC architecture. Memory is accessed using load/store instructions, and various arithmetic/logic operations are executed using register-to-register operation instructions. • The M32R-FPU internally contains sixteen 32-bit general-pur.


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