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AD8372 Dataheets PDF



Part Number AD8372
Manufacturers Analog Devices
Logo Analog Devices
Description Programmable Dual VGA
Datasheet AD8372 DatasheetAD8372 Datasheet (PDF)

Data Sheet FEATURES Dual independent digitally controlled VGA Differential input and output 150 Ω differential input Open-collector differential output 7.8 dB noise figure to 100 MHz @ maximum gain HD2/HD3 better than 77 dBc for 1 V p-p differential output −3 dB bandwidth of 130 MHz 41 dB gain range 1 dB step size ± 0.2 dB Serial 8-bit bidirectional SPI control interface Wide input dynamic range Pin-programmable output stage Power-down feature Single 5 V supply: 106 mA per channel 32-lead LFCSP,.

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Data Sheet FEATURES Dual independent digitally controlled VGA Differential input and output 150 Ω differential input Open-collector differential output 7.8 dB noise figure to 100 MHz @ maximum gain HD2/HD3 better than 77 dBc for 1 V p-p differential output −3 dB bandwidth of 130 MHz 41 dB gain range 1 dB step size ± 0.2 dB Serial 8-bit bidirectional SPI control interface Wide input dynamic range Pin-programmable output stage Power-down feature Single 5 V supply: 106 mA per channel 32-lead LFCSP, 5 mm × 5 mm package APPLICATIONS Differential ADC drivers CMTS upstream direct sampling receivers CATV modem signal scaling Generic RF/IF gain stages Single-ended-to-differential conversion GENERAL DESCRIPTION The AD8372 is a dual, digitally controlled, variable gain amplifier (VGA) that provides precise gain control, high IP3, and low noise figure. The excellent distortion performance and moderate signal bandwidth make the AD8372 a suitable gain control device for a variety of multichannel receiver applications. For wide input dynamic range applications, the AD8372 provides a broad 41 dB gain range. The gain is programmed through a bidirectional 4-pin serial interface. The serial interface consists of a clock, latch, data input, and data output lines for each channel. The AD8372 provides the ability to set the transconductance of the output stage using a single external resistor. The RXT1 and RXT2 pins provide a band gap derived stable reference voltage of 1.56 V. Typically 2.0 kΩ shunt resistors to ground are used to set the maximum gain to a nominal value of 31 dB. The current 41 dB Range, 1 dB Step Size, Programmable Dual VGA AD8372 FUNCTIONAL BLOCK DIAGRAM ENB1 IPC1 INC1 RXT1 AD8372 CHANNEL 1 POSTAMP REF1 OPC1 ONC1 CLK1 SDO1 SDI1 LCH1 RXT2 IPC2 INC2 ENB2 REGISTERS AND GAIN DECODER CHANNEL 2 POSTAMP Figure 1. CLK2 SDO2 SDI2 LCH2 OPC2 ONC2 REF2 07051-001 setting resistors can be adjusted to manipulate the gain and distortion performance of each channel. This is a flexible feature in applications where it is desirable to trade off distortion performance for lower power consumption. The AD8372 is powered on by applying the appropriate logic level to the ENB1, ENB2 pins. When powered down, the AD8372 consumes less than 2.6 mA and offers excellent input-to-output isolation. The gain setting is preserved when powered down. Fabricated on an Analog Devices, Inc., high frequency BiCMOS process, the AD8372 provides precise gain adjustment capabilities with good distortion performance. The quiescent current of the AD8372 is typically 106 mA per channel. The AD8372 amplifier comes in a compact, thermally enhanced 5 mm × 5 mm 32-lead LFCSP package and operates over the temperature range of −40°C to +85°C. Rev. C Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 ©2007–2017 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com AD8372 TABLE OF CONTENTS Features .............................................................................................. 1 Applications....................................................................................... 1 Functional Block Diagram .............................................................. 1 General Description ......................................................................... 1 Revision History ............................................................................... 2 Specifications..................................................................................... 3 Serial Control Interface Timing ................................................. 5 Absolute Maximum Ratings............................................................ 6 ESD Caution.................................................................................. 6 Pin Configuration and Function Descriptions............................. 7 REVISION HISTORY 9/2017—Rev. B to Rev. C Changed CP-32-2 to CP-32-7 ...................................... Throughout Updated Outline Dimensions ....................................................... 13 Changes to Ordering Guide .......................................................... 13 6/2011—Rev. A to Rev. B Changes to Table 4............................................................................ 6 Changes to Figure 4 and Table 5..................................................... 7 Added Exposed Pad Notation to Outline Dimensions ............. 13 Changes to Order.


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