Document
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Version 1.2, Aug 2004
Datasheet
DS-CoreControl-TDA21107
TDA21107
Published by Infineon Technologies AG http://www.infineon.com/DCDC
Power Management & Drive
N e v e r s t o p t h i n k i n g.
CoreControl TM
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Contents:
Features………………………………………………………………………………………………………......3 Application……………………………………………………………………………………………………...…3 Pinout Drawing and Description………………………………………………………………………………...3 General Description……………………………………………………………………………………………...4 Block Diagram…………………………………………………………………………………………………….4 Application Circuit…...……………………………………………………………………………………………5 Absolute Maximum Rating .................................................................................................................... 6 Thermal Characteristic.......................................................................................................................... 7 Operation Condition.............................................................................................................................. 7 Electrical Characteristic ........................................................................................................................ 8 Outline Diemension………………………………………………………………………………………………9 Revision Histroy…..…………………………………………………………………………………………….10 Sales Office Worldwide.………………………………………………………………………………………..11
CoreControl TM
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DS-CoreControl-TDA21107
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High speed Driver with bootstrapping for dual Power MOSFETs Features:
• • • • • • • • •
P-DSO-8
Fast rise and fall times for frequencies up to 1 MHz Adjustable High Side MOSFET gate drive voltage via external voltage supply to BOOT for optimizing ON losses and gate drive losses ( 5V to 12V is recommended ) Prevents from cross-conducting by adaptive gate drive control Supports shut-down mode for very low quiescent current through three-state input Compatible to standard PWM controller ICs (IFX, Intersil, Analog Devices, Richtek) Floating High Side MOSFET drive Power-on Overvoltage Protection Footprint compatible to ADP3418 Ideal for multi-phase Desktop CPU supplies on motherboards and VRM´s
Application:
• • • Voltage Regulator Modules Low Output Voltage High Output Current DC-DC Converters Half-Bridge Class D Amplifier Type TDA21107 Package P-DSOP-8 Marking 21107 Ordering Code Q67042-S4251
Pinout Drawing and Description:
CoreControl TM
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DS-CoreControl-TDA21107
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General Description
The dual high speed driver is designed to drive a wide range of N-Channel low side and N-Channel high side MOSFETs with varying gate charges. It has a small propagation delay from PWM input pin to GATEHS and GATELS, short rise and fall times and the same pin configuration as the ADP3418. In addition it provides several protection features as well as a shut down mode for efficiency reasons.
Target application
The dual high speed driver is designed to work well in half-bridge type circuits where dual N-Channel MOSFETs are utilized. A circuit designer can fully take advantage of the driver´s capabilities in highefficiency, high-density synchronous DC/DC converters that operate at high switching frequencies, e.g. in multi-phase converters for CPU supplies on motherboards and VRM´s but also in motor drive and half bridge class-D amplifier type applications.
Block Diagram
VCC
Internal 5V
BOOT
Control Logic HS Driver PowerOn OVP VCC Shoot Through Protection LS Driver
GATEHS PHAS
PWM
GATELS
GND
CoreControl TM
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Application Circuit
1 2 3 4
A
A
B
B
12VF1
IPD09N03LA
IPD09N03LA
C6 1uF/16V
1
C1
C2
R2 *
8 7 6 5
BOOST GATEHS PWM NC VCC PHASE PGND GATELS
PWM signal f rom CoreControl controller
C
2 3 4
22uF/16V
Q1
Q2
330uF/16V
L1 IPD05N03LA Q3 Q4 IPD06N03LA C5 1nF/16V R1 4R7
1uH 2200uF/6,3V 22uF/10V
VCORE
C
R3* 1N4148
12V
TDA21107
C7 1uF/16V
C3
C4
*) R2 is the optional resistor for slowing down the high speed during turn-on *) R3 is the 500K ohm resistor for avoiding the fault start-up behavior of driver during turn-on
D
Layout Notice : 1. C1 and C2 should be placed at the drain of Q1 and Q2 and the source of Q3 and Q4. 2. C7 should be placed close to the VCC pin and GND pin of TDA21107. 3. 1N4148, C6 and R2 should be placed close to TDA21107. 4. The traces of GATEHS and PHASE should be routed in parallel and the trace width should not be less than 40 mil. 5. The trace width of GATELS should not be less than 40 mil and it should be clsoe to the gate pins of Q3 and Q4.
1 2 3
Title Size A4 Date: File: Number
CoreControl Driver TDA21107
Revision
D
Application Circuit
09.08.2004 Sheet of C:\UserData\..\TDA21107_Application.SCHDOC Drawn By: 4
1,0
Edward Chang
CoreControl TM
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Absolute Maximum Ratings
At Tj = 25 °C, unless otherwise specified
Parameter
Symbol
Value Min MAX
15 7 15
Unit
Volta.