D Flip-Flops. 54LS74 Datasheet

54LS74 Flip-Flops. Datasheet pdf. Equivalent

Part 54LS74
Description Dual Positive-Edge-Triggered D Flip-Flops
Feature www.DataSheet4U.com 54LS74 DM54LS74A DM74LS74A Dual Positive-Edge-Triggered D Flip-Flops with Prese.
Manufacture National Semiconductor
Datasheet
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54LS74
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June 1989
54LS74 DM54LS74A DM74LS74A
Dual Positive-Edge-Triggered D Flip-Flops
with Preset Clear and Complementary Outputs
General Description
This device contains two independent positive-edge-trig-
gered D flip-flops with complementary outputs The informa-
tion on the D input is accepted by the flip-flops on the posi-
tive going edge of the clock pulse The triggering occurs at a
voltage level and is not directly related to the transition time
of the rising edge of the clock The data on the D input may
be changed while the clock is low or high without affecting
the outputs as long as the data setup and hold times are not
violated A low logic level on the preset or clear inputs will
set or reset the outputs regardless of the logic levels of the
other inputs
Features
Y Alternate military aerospace device (54LS74) is avail-
able Contact a National Semiconductor Sales Office
Distributor for specifications
Connection Diagram
Dual-In-Line Package
Function Table
TL F 6373 – 1
Order Number 54LS74DMQB 54LS74FMQB 54LS74LMQB
DM54LS74AJ DM54LS74AW DM74LS74AM or DM74LS74AN
See NS Package Number E20A J14A M14A N14A or W14B
Inputs
Outputs
PR CLR CLK D
Q
Q
LH
XXH
L
HL
XX L
H
LL
X XH
H
H
H
uH
H
L
H H uL L H
HH
L X Q0 Q0
H e High Logic Level
X e Either Low or High Logic Level
L e Low Logic Level
u e Positive-going Transition
e This configuration is nonstable that is it will not persist when either the preset
and or clear inputs return to their inactive (high) level
Q0 e The output logic level of Q before the indicated input conditions were established
C1995 National Semiconductor Corporation TL F 6373
RRD-B30M105 Printed in U S A



54LS74
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Absolute Maximum Ratings (Note)
If Military Aerospace specified devices are required
please contact the National Semiconductor Sales
Office Distributors for availability and specifications
Supply Voltage
7V
Input Voltage
7V
Operating Free Air Temperature Range
DM54LS and 54LS
b55 C to a125 C
DM74LS
0 C to a70 C
Storage Temperature Range
b65 C to a150 C
Note The ‘‘Absolute Maximum Ratings’’ are those values
beyond which the safety of the device cannot be guaran-
teed The device should not be operated at these limits The
parametric values defined in the ‘‘Electrical Characteristics’’
table are not guaranteed at the absolute maximum ratings
The ‘‘Recommended Operating Conditions’’ table will define
the conditions for actual device operation
Recommended Operating Conditions
Symbol
Parameter
DM54LS74A
Min Nom Max
VCC Supply Voltage
VIH High Level Input Voltage
VIL Low Level Input Voltage
IOH High Level Output Current
IOL Low Level Output Current
fCLK
Clock Frequency (Note 2)
fCLK
Clock Frequency (Note 3)
tW
Pulse Width
Clock High
(Note 2)
Preset Low
45 5 55
2
07
b0 4
4
0 25
0 20
18
15
Clear Low
15
tW
Pulse Width
Clock High
(Note 3)
Preset Low
25
20
Clear Low
20
tSU Setup Time (Notes 1 and 2)
20u
tSU Setup Time (Notes 1 and 3)
25u
tH Hold Time (Note 1 and 4)
0u
TA Free Air Operating Temperature
b55
uNote 1 The symbol ( ) indicates the rising edge of the clock pulse is used for reference
Note 2 CL e 15 pF RL e 2 kX TA e 25 C and VCC e 5V
Note 3 CL e 50 pF RL e 2 kX TA e 25 C and VCC e 5V
Note 4 TA e 25 C and VCC e 5V
125
DM74LS74A
Min Nom Max
4 75 5 5 25
2
08
b0 4
8
0 25
0 20
18
15
15
25
20
20
20u
25u
0u
0 70
Units
V
V
V
mA
mA
MHz
MHz
ns
ns
ns
ns
ns
C
2





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