V54C365164VC

MOSEL VITELIC V54C365164VC HIGH PERFORMANCE 166/143/125 MHz 3.3 VOLT 4M X 16 SYNCHRONOUS DRAM 4 BANKS X 1Mbit X 16 PRELIMINARY 6 System Frequency (fCK) Clock Cycle Time (tCK3) Clock Access Time (tAC3) CAS Latency = 3 Clock Access Time (tAC2) CAS Latency = 2 Clock Access Time (tAC1) CAS Latency = 1 166 MHz 6 ns 5.4 ns 5.5 ns 13 ns 7 143 MHz 7 ns 5.4 ns 5.5 ns 13 ns 8PC 125 MHz 8 ns 6 ns 6 ns 13 ns I 4 banks x 1Mbit x 16 organization I High speed data transfer rates up to 166 MHz I Full Synchronous Dynamic RAM, with all signals referenced to clock rising edge I Single Pulsed RAS Interface I Data Mask for byte Control I Four Banks controlled by BA0 & BA1 I Programmable CAS Latency: 1, 2, & 3 I Programmable Wrap Sequence: Sequential or Interleave I Programmable Burst Length: 1, 2, 4, 8 and full page for Sequential Type 1, 2, 4, 8 for Interleave Type I Multiple Burst Read with Single Write Operation I Automatic and Controlled Precharge Command I Random Column Address every CLK (1-N Rule) I Suspend Mode and Power Down Mode I Auto Refresh and Self Refresh I Refresh Interval: 4096 cycles/64 ms I Available in 54 Pin 400 mil TSOP-II I LVTTL Interface I Single +3.3 V ±0.3 V Power Supply Features Description The V54C365164VC is a four bank Synchronous DRAM organized as 4 banks x 1Mbit x 16. The V54C365164VC achieves high speed data transfer rates up to 166 MHz by employing a chip architecture that prefetches multiple bits and then synchronizes the output data to a system clock Al...