CYV15G0404RB

PRELIMINARY CYV15G0404RB Independent Clock Quad HOTLink II™ Reclocking Deserializer Features Quad channel video reclocking deserializer — 195- to 1500-Mbps serial data signaling rate — Simultaneous operation at different signaling rates Second-generation HOTLink® technology Compliant to SMPTE 292M and SMPTE 259M video standards www.DataSheet4U.com Supports reception of either 1.485 or 1.485/1.001 Gbps data rate with the same training clock Supports half-rate and full-rate clocking Internal phase-locked loops (PLLs) with no external PLL components Selectable differential PECL-compatible serial inputs — Internal DC-restoration Synchronous LVTTL parallel interface JTAG boundary scan Built-In Self-Test (BIST) for at-speed link testing Link Quality Indicator — Analog signal detect — Digital signal detect Low-power 3W @ 3.3V typical Single 3.3V supply Thermally enhanced BGA 0.25µ BiCMOS technology channels are independent and can simultaneously operate at different rates. Each receive channel accepts serial data and converts it to 10-bit parallel characters and presents these characters to an Output Register. The received serial data can also be reclocked and retransmitted through the reclocker serial outputs. Figure 1 illustrates typical connections between independent video co-processors and corresponding CYV15G0404RB Reclocking Deserializer and CYV15G0403TB Serializer chips. The CYV15G0404RB satisfies the SMPTE-259M and SMPTE-292M compliance as pe...