Flash Memory. AM29LV008T Datasheet

AM29LV008T Memory. Datasheet pdf. Equivalent

AM29LV008T Datasheet
Recommendation AM29LV008T Datasheet
Part AM29LV008T
Description 8 Megabit Sectored Flash Memory
Feature AM29LV008T; PRELIMINARY Am29LV008T/Am29LV008B 8 Megabit (1,048,576 x 8-Bit) CMOS 3.0 Volt-only, Sectored Flash .
Manufacture Advanced Micro Devices
Datasheet
Download AM29LV008T Datasheet





Advanced Micro Devices AM29LV008T
PRELIMINARY
Am29LV008T/Am29LV008B
8 Megabit (1,048,576 x 8-Bit) CMOS 3.0 Volt-only,
Sectored Flash Memory
DISTINCTIVE CHARACTERISTICS
s Single power supply operation
— Extended voltage range: 2.7 to 3.6 volt read and
write operations for battery-powered
www.DataSheet4U.com applications
— Standard voltage range: 3.0 to 3.6 volt read and
write operations and for compatibility with high
performance 3.3 volt microprocessors
s High performance
— Extended voltage range: access times as fast as
100 ns
— Standard voltage range: access times as fast as
90 ns
s Ultra low power consumption
— Automatic Sleep Mode: 200 nA typical
— Standby mode: 200 nA typical
— Read mode: 2 mA/MHz typical
— Program/erase mode: 20 mA typical
s Flexible sector architecture
— One 16 Kbyte, two 8 Kbyte, one 32 Kbyte, and
fifteen 64 Kbyte sectors
— Supports control code and data storage on a
single device
— Sector Protection features:
A hardware method of locking a sector to
prevent any program or erase operations within
that sector
Temporary Sector Unprotect feature allows code
changes in previously locked sectors
s Top or bottom boot block configurations
available
s Embedded Algorithms
— Embedded Erase algorithms automatically
preprogram and erase the entire chip or any
combination of designated sectors
— Embedded Program algorithms automatically
write and verify bytes or words at specified
addresses
s Minimum 100,000 write cycle guarantee per
sector
s Package option
— 40-pin TSOP
s Compatibility with JEDEC standards
— Pinout and software compatible with single-
power supply Flash
— Superior inadvertent write protection
s Data Polling and toggle bits
— Provides a software method of detecting
program or erase operation completion
s Ready/Busy pin
— Provides a hardware method of detecting
program or erase cycle completion
s Erase suspend/resume feature
— Provides the ability to suspend the erase
operation in any sector, read data from or
program data to any other sector, then return to
the original sector and complete the initial erase
operation
s Hardware reset pin (RESET)
— Hardware method to reset the device to the read
mode
GENERAL DESCRIPTION
The Am29LV008 is an 8 Mbit, 3.0 Volt-only Flash mem-
ory organized as 512 Kbytes of 8 bits each. For flexible
erase and program capability, the 512 Kbits of data is
divided into 19 sectors of one 16 Kbyte, two 8 Kbyte,
one 32 Kbyte, and fifteen 64 Kbytes. The data appears
on DQ0–DQ7. The Am29LV008 is offered in a 40-pin
TSOP package. This device is designed to be pro-
grammed in-system with the standard system 3.0 volt
VCC supply. The device can also be reprogrammed in
standard EPROM programmers.
The Am29LV008 provides two levels of performance.
The first level offers access times as fast as 100 ns with
a VCC range as low as 2.7 volts, which is optimal for
battery powered applications. The second level offers a
This document contains information on a product under development at Advanced Micro Devices. The information
is intended to help you evaluate this product. AMD reserves the right to change or discontinue work on this proposed
product without notice.
Publication# 20511 Rev: C Amendment/+1
Issue Date: May 1997



Advanced Micro Devices AM29LV008T
PRELIMINARY
90 ns access time, optimizing performance in systems
where the power supply is in the regulated range of 3.0
to 3.6 volts. To eliminate bus contention, the device has
separate chip enable (CE), write enable (WE), and
output enable (OE) controls.
The Am29LV008 is entirely command set-compatible
with the JEDEC single-power-supply Flash standard.
Commands are written to the command register using
standard microprocessor write timings. Register con-
tents serve as input to an internal state-machine that
controls the erase and programming circuitry. Write cy-
cles also internally latch addresses and data needed
for the programming and erase operations. Reading
data out of the device is similar to reading from other
www.DataSheet4U.Fcloamsh or EPROM devices.
The Am29LV008 is programmed by executing the pro-
gram command sequence. This invokes the Embedded
Program Algorithm, which is an internal algorithm that
automatically times the program pulse widths and veri-
fies proper cell margin. The device is erased by execut-
ing the erase command sequence. This invokes the
Embedded Erase Algorithm, which is an internal algo-
rithm that automatically preprograms the array, if it is
not already programmed, before executing the erase
operation. During erase, the device automatically times
the erase pulse widths and verifies proper cell margin.
This device also features a sector erase architecture.
This allows for sectors of memory to be erased and re-
programmed without affecting the data contents of
other sectors. A sector is typically erased and verified
within 1.0 second. The Am29LV008 is fully erased
when shipped from the factory.
The Am29LV008 device also features hardware sector
protection, implemented via external programming
equipment, which disables both program and erase op-
erations in any combination of the memory sectors.
The Erase Suspend feature enables the user to pause
the erase operation, for any period of time, to read data
from or program data to a sector that was not being
erased. Thus, true background erase can be achieved.
The device features 3.0 volt, single-power-supply oper-
ation for both read and write functions. Internally gen-
erated and regulated voltages are provided for the
program and erase operations. A low VCC detector au-
tomatically inhibits write operations during power tran-
sitions. The end of program or erase is detected by the
RY/BY pin. Data Polling of DQ7, or by the Toggle Bit
(DQ6). Once the end of a program or erase cycle has
been completed, the device automatically resets to the
read mode.
The Am29LV008 also has a hardware RESET pin.
When this pin is driven low, execution of any Embed-
ded Program or Erase Algorithm will be terminated.
The internal state machine is then be reset into the
read mode. Resetting the device will enable the sys-
tem’s microprocessor to read the boot-up firmware
from the Flash memory.
AMD’s Flash technology combines years of Flash
memory manufacturing experience to produce the
highest levels of quality, reliability and cost effective-
ness. The Am29LV008 memory electrically erases
all bits within a sector simultaneously via Fowler-
Nordheim tunneling. The bytes are programmed one
byte at a time using the EPROM programming mecha-
nism of hot electron injection.
2 Am29LV008T/Am29LV008B



Advanced Micro Devices AM29LV008T
PRELIMINARY
PRODUCT SELECTOR GUIDE
Family Part Number
Ordering Part Number:
Max access time (ns)
VCC = 3.0–3.6 V
VCC = 2.7–3.6 V
CE access time (ns)
OE access time (ns)
-90R
90
90
40
Am29LV008T/Am29LV008B
-100
100
100
40
-120
120
120
50
-150
150
150
55
BLOCK DIAGRAM
www.DataSheet4U.com
VCC
VSS
RESET
RY/BY
WE
BYTE
CE
OE
State
Control
Command
Register
Sector
Switches
Erase Voltage
Generator
DQ0–DQ7
Input/Output
Buffers
PGM Voltage
Generator
Chip Enable
Output Enable
Logic
STB Data Latch
VCC Detector
A0–A19
Timer
STB Y-Decoder
Y-Gating
X-Decoder
Cell Matrix
20511C-1
Am29LV008T/Am29LV008B
3





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