AN177 Locked Loop Datasheet

AN177 Datasheet, PDF, Equivalent


Part Number

AN177

Description

An Overview og the Phase Locked Loop

Manufacture

Philips

Total Page 6 Pages
Datasheet
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AN177
INTEGRATED CIRCUITS
www.DataSheet4U.com
AN177
An overview of the phase-locked loop
(PLL)
1988 Dec
Philips
Semiconductors

AN177
Philips Semiconductors
An overview of the phase-locked loop (PLL)
Application note
AN177
Portions of this Phase-Locked Loop section were edited by Dr. J. A. Connelly
INTRODUCTION
The basic phase-locked loop (PLL) concept has been known and
widely utilized since first being proposed in 1922. Since that time,
PLLs have been used in instrumentation, space telemetry, and many
other applications requiring a high degree of noise immunity and
narrow bandwidth. Techniques and systems involved in these
applications frequently are quite complex, requiring a high degree of
sophistication. Many of the PLL applications have been at
microwave frequencies and employ complex phase shifters, signal
splitters, modulation, and demodulation schemes such as bi-phase
and quadra-phase. Because of the high frequencies involved in
microwave applications, most all components of these PLL systems
www.DataSheaert4eUm.caodme from discrete as opposed to integrated circuits. However,
in other communication system applications such as FSK and FM
and AM demodulation where frequencies are below approximately
100MHz, monolithic PLLs have found wide application because of
their low cost versus high performance.
A block diagram representation of a PLL is shown in Figure 1.
Phase-locked loops operate by producing an oscillator frequency to
match the frequency of an input signal, fl. In this locked condition,
any slight change in fl first appears as a change in phase between fl
and the oscillator frequency. This phase shift then acts as an error
signal to change the frequency of the local PLL oscillator to match fl.
The locking onto a phase relationship between fl and the local
oscillator accounts for the name phase-locked loop.
A MECHANICAL ANALOG TO THE PLL
To better visualize the frequency and phase relationships in a PLL,
consider the mechanical system shown in Figure 2 which is a dual
to the electronic PLL. This mechanical system has two identical,
heavy disks with two separate center shafts attached to each disk.
Each shaft is presumed to be mounted on a bearing that allows
each massive disk to be rotated in either direction when some
external force is applied. The shafts are coupled together by a
spring whose end points are fixed to each shaft. This spring can be
twisted in either direction, depending upon the relative positions of
the shafts. The spring cannot ”kink up” due to the shafts passing
through the center of the spring.
Now suppose the sequence of events shown in Figure 3 occurs to
the mechanical system. The disks are simply represented like clock
faces with positional reference markers. Initially, both disks are
stationary in a neutral position. Then the left disk, or input, is
advanced slowly clockwise through an angle ~~ position. The right
disk, or output, initially doesn’t move as the spring begins to tighten.
As the input continues to move and when it reaches ~2. begins to
turn and tracks the input with a positional phase shift error of ~e =
~2 (l)
At any point in time, with both disks slowly turning at the same
speed, there will be some inherent phase error between the disks, or
~e = ~3 ~4
(2)
This positional phase error in the mechanical system is analogous to
the phase error in the electronic PLL. When the input disk coasts to
a stop, the output also gradually comes to a stop with a fixed phase
error equal to that in Equation 2 or ~e = ~s ~6 = ~3 ~4 (3)
The spring has a residual stored twist in one direction due to ~e
Now consider that the disks are first returned to their neutral
positions. Then the input disk is instantaneously rotated through an
angle of ~l as shown in Figure 4. The output disk can’t respond
instantaneously because of its large mass. It doesn’t move
instantaneously and the spring develops considerable torque. Then,
as shown in the sequence of events in Figure 4, the output disk
begins accelerating after some delay due to the large phase error. It
swings past the stopped position of the input disk due to its
momentum, reaches a peak overshoot, and gradually oscillates
about ~~ with a damped response, finally coming to rest with some
small residual phase error. The input twist of ~1 represents the
application of a step of position or phase to the system, and the
response of the output disk is typical for a second-order,
underdamped system. This same type of secondorder behavior
occurs in the PLL system for an instantaneous change of input
phase.
As a final example, consider the events in Figure 5 where both disks
are rotating at a constant rate. Applying a strobing light (strobotac)
simultaneously to both disks and adjusting its flashing rate to one
flash per disk rotation will cause the positional markers to appear
stationary. There will be a constant phase error in this case just as
there was in Figure 3. Now suppose the revolution rate of the input
disk gradually increases by a small amount to a new rate. The
positional marker will appear to walk around the disk. The output
first senses the increased rate of the input through an increase in
the phase error.
INPUT
PHASE
COMPARATOR
OUTPUT
VI(t) VO(t)
FI PARAMETERS FO
θj θO
LOW-PASS
FILTER
VOLTAGE
CONTROLLED
OSCILLATOR
SL01005
Figure 1. Block Diagram of a Phase-Locked Loop
Figure 2. Mechanic Analog to PLL
SL01006
Then, after some delay, the rate of the output gradually increases to
track the input. Both positional markers appear to be walking around
each disk at the same rate until the strobotac is adjusted for the
higher input and output rate. Then the strobe light again freezes the
markers, producing a phase error at this higher rate that is larger
than before the input rate was increased. This gradual increase in
the input rate to the mechanical system simulates a ramp change in
the input frequency to the PLL system. The response to the output
disk simulates the behavior of the oscillator in the PLL.
If the rate of the input disk is alternately increased and decreased by
some small amount compared to the nominal revolution rate, the
positional markers will appear to walk both clockwise and counter
clockwise, momentarily appearing stationary when the strobing light
rate equals the disk revolution rate. This ”walking” represents a
changing phase error which is occurring at the modulation rate.
Thus the phase error can be thought of as a useable demodulated
output signal.
The disk-spring mechanical system is a helpful analog for visualizing
frequency, phase, transient, and steady-state responses in the
electronic phase-locked loop system. In this example, the positions
December 1988
2


Features INTEGRATED CIRCUITS www.DataSheet4U.com AN177 An overview of the phase-locked loop (PLL) 1988 Dec Philips Semicondu ctors Philips Semiconductors Applicat ion note An overview of the phase-lock ed loop (PLL) Portions of this Phase-Lo cked Loop section were edited by Dr. J. A. Connelly INTRODUCTION The basic pha se-locked loop (PLL) concept has been k nown and widely utilized since first be ing proposed in 1922. Since that time, PLLs have been used in instrumentation, space telemetry, and many other applic ations requiring a high degree of noise immunity and narrow bandwidth. Techniq ues and systems involved in these appli cations frequently are quite complex, r equiring a high degree of sophisticatio n. Many of the PLL applications have be en at microwave frequencies and employ complex phase shifters, signal splitter s, modulation, and demodulation schemes such as bi-phase and quadra-phase. Bec ause of the high frequencies involved i n microwave applications, most all components of these PLL syst.
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