EDI8F32256C. 8F32256C Datasheet

8F32256C EDI8F32256C. Datasheet pdf. Equivalent

Part 8F32256C
Description EDI8F32256C
Feature EDI8F32256C 256Kx32 SRAM Module Features 256Kx32 bit CMOS Static Random Access Memory • Access Time.
Manufacture White Electronic Designs Corporation
Datasheet
Download 8F32256C Datasheet



8F32256C
EDI8F32256C
256Kx32 SRAM Module
Features
www.DataSheet4U.com
256Kx32 bit CMOS Static
Random Access Memory
• Access Times
BiCMOS: 10 and 12ns
CMOS: 15, 20, 25, and 35ns
• Individual Byte Selects
• Fully Static, No Clocks
• TTL Compatible I/O
High Density Package with JEDEC Standard Pinouts
• 64 Pin ZIP, No. 85
• 64 Lead Angled SIMM, No. 32
• 64 Lead SIMM, No. 333
• 64 ZIP Low Profile, No. 188
• Common Data Inputs and Outputs
Single +5V (±10%) Supply Operation
Pin Configurations and Block Diagram
PD1 2
DQØ 4
DQ1 6
DQ2 8
DQ3 10
VCC 12
A7 14
A8 16
A9 18
DQ4 20
DQ5 22
DQ6 24
DQ7 26
W 28
A14 30
EØ 32
E2
A16
VSS
DQ16
DQ17
DQ18
DQ19
A10
A11
A12
A13
DQ20
DQ21
DQ22
DQ23
VSS
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
1 VSS
3 PD2
5 DQ8
7 DQ9
9 DQ10
11 DQ11
13 AØ
15 A1
17 A2
19 DQ12
21 DQ13
23 DQ14
25 DQ15
27 VSS
29 A15
31 E1
33 E3
35 A17
37 G
39 DQ24
41 DQ25
43 DQ26
45 DQ27
47 A3
49 A4
51 A5
53 VCC
55 A6
57 DQ28
59 DQ29
61 DQ30
63 DQ31
64 Pin
PD1 - VSS
PD2 - VSS
256Kx32 Static RAM
CMOS, High Speed Module
The EDI8F32256C is a high speed 8 megabit Static RAM
module organized as 256K words by 32 bits. This module is
constructed from eight 256Kx4 Static RAMs in SOJ packages
on an epoxy laminate (FR4) board.
Four chip enables (EØ-E3) are used to independently enable
the four bytes. Reading or writing can be executed on
individual bytes or any combination of multiple bytes through
proper use of selects.
The EDI8F32256C is offered in 64 pin ZIP/SIMM package
which enables eight megabits of memory to be placed in less
than 1.4 square inches of board space.
All inputs and outputs are TTL compatible and operate from a
single 5V supply. Fully asynchronous circuitry requires no
clocks or refreshing for operation and provides equal access
and cycle times for ease of use.
The ZIP and SIMM modules contain two pins, PD1 and PD2,
which are used to identify module memory density in applica-
tions where alternate modules can be interchanged.
Pin Names
AØ-A17
EØ-E3
W,
G
DQØ-DQ31
VCC
VSS
W
G
E1
E2
E3
Address Inputs
Chip Enables
Write Enables
Output Enable
Common Data Input/Output
Power (+5V±10%)
Ground
DQØ-DQ3
4
4 DQ8-DQ11
4 DQ16-DQ19
DQ24-DQ27
4
4 DQ4-DQ7
4 DQ12-DQ15
4 DQ20-DQ23
4 DQ28-DQ31
Electronic Designs, Inc.
• One Research Drive • Westborough, MA 01581USA • 508-366-5151 • FAX 508-836-4850 •
http://www.electronic-designs.com
1
EDI8F32256C Rev. 12 9/98 ECO #10816



8F32256C
Absolute Maximum Ratings*
Voltage on any pin relative to VSS
Operating Temperature TA (Ambient)
Commercial.
Industrial
Storage Temperature, Plastic
Power Dissipation
Output Current.
-0.5V to 7.0V
0°C to +70°C
-40°C to +85°C
-55°C to +125°C
8.0 Watt
20 mA
*Stress greater than those listed under "Absolute Maximum Ratings" may cause
permanent damage to the device. This is a stress rating only and functional
www.DataSheet4U.coomperation of the device at these or any other conditions greater than those indicated
in the operational sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect reliability.
Recommended DC Operating Conditions
Parameter
Supply Voltage
Supply Voltage
Input High Voltage
Input Low Voltage
Sym
VCC
VSS
VIH
VIL
Min
4.5
0
2.2
-0.3
Typ Max Units
5.0 5.5 V
0 0V
-- VCC+0.3V V
-- 0.8 V
AC Test Conditions
Input Pulse Levels
Input Rise and Fall Times
Input and Output Timing Levels
Output Load
(note: For TEHQZ,TGHQZ and TWLQZ, CL = 5pF)
VSS to 3.0V
5ns
1.5V
1TTL, CL = 30pF
DC Electrical Characteristics
Parameter
Sym
Operating Power Supply Current ICC1
Standby (TTL) Power Supply Current ICC2
Full Standby Power Supply Current ICC3
CMOS
Input Leakage Current
ILI
Output Leakage Current
ILO
Output High Voltage
VOH
Output Low Voltage
VOL
*Typical: TA = 25°C, VCC = 5.0V
Conditions
W, E = VIL, II/O = 0mA, Min Cycle
E • VIH, VIN - VIL or VIN • VIH
E • VCC-0.2V
VIN • VCC-0.2V or VIN - 0.2V
VIN = 0V to VCC
V I/O = 0V to VCC
IOH = -4.0mA
IOL = 8.0mA
Min Max Max Max Max Units
10-12 15ns 20 25-35 ns
1360 1280 1440 1280 mA
480 240 200 200 mA
80 80 40 40 mA
-- ±80 ±80 ±80 ±80 µA
-- ±20 ±20 ±20 ±20 µA
2.4 — — — — V
— 0.4 0.4 0.4 0.4 V
Truth Table
E WG
Mode Output
H XX
Standby HIGH Z
L HL
Read DOUT
L LX
Write DIN
L H H Output Deselect HIGH Z
Power
ICC3
ICC1
ICC1
ICC1
Capacitance
(f=1.0MHz, VIN=VCC or VSS)
Parameter
Address Lines
Data Lines
Chip Enable Line
Write Control Line
Sym
CI
CD/Q
CC
CN
These parameters are sampled, not 100% tested.
Max
60
20
20
60
Unit
pF
pF
pF
pF
EDI8F32256C
256Kx32 SRAM Module
2
EDI8F32256C Rev. 12 9/98 ECO #10816





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