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APL5330 Dataheets PDF



Part Number APL5330
Manufacturers Anpec Electronics
Logo Anpec Electronics
Description Dual Input 2A Low Dropout Regulator
Datasheet APL5330 DatasheetAPL5330 Datasheet (PDF)

APL5330 Dual Input 2A Low Dropout Regulator Features • • www.DataSheet4U.com General Description The APL5330 integrates a power transistor to provide regulated voltage with maximum output current of 2A. It also incorporates current-limit, thermal shutdown and shutdown control functions into a single chip. The current-limit circuit limits the maximum output current in overload or short-circuit conditions. The on-chip thermal shutdown provides protection against any combination of overload that .

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APL5330 Dual Input 2A Low Dropout Regulator Features • • www.DataSheet4U.com General Description The APL5330 integrates a power transistor to provide regulated voltage with maximum output current of 2A. It also incorporates current-limit, thermal shutdown and shutdown control functions into a single chip. The current-limit circuit limits the maximum output current in overload or short-circuit conditions. The on-chip thermal shutdown provides protection against any combination of overload that would create excessive junction temperature. The output voltage of the APL5330 tracks the reference voltage on VREF pin. A resistor divider connected to VREF pin is usually used to provide reference voltage to the IC. In addition, an external ceramic capacitor and an open-drain transistor connected to VREF pin provides soft-start and shutdown control. Applying and holding a voltage below 0.35V (typ.) to VREF shuts off the output. Fast Transient Response High Output Accuracy - ±20mV over Load, Output Voltage Offset and Temperature Adjustable Output Voltage by External Resistors • • • • • • Current-Limit Protection On-Chip Thermal Shutdown Shutdown for Standby or Suspend Mode Simple SOP-8 and SOP-8 with Thermal Pad Packages Lead Free Available (RoHS Compliant) Applications • • VGA Card Power Chip Set Power Pin Configuration VIN GND VREF VOUT 1 2 3 4 8 7 6 5 VCNTL VCNTL VCNTL VCNTL VIN GND VREF VOUT 1 2 3 4 8 7 6 5 NC NC VCNTL NC SOP-8 (Top View) NC = No internal connection = Thermal Pad SOP-8-P (Top View) (connected to GND plane for better heat dissipation) ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise customers to obtain the latest version of relevant information to verify before placing orders. Copyright © ANPEC Electronics Corp. Rev. A.1 - Jun., 2006 1 www.anpec.com.tw APL5330 Ordering and Marking Information APL5330 Lead Free Code Handling Code Temp. Range Package Code APL5330KE-TR : APL5330KAE-TR : www.DataSheet4U.com APL5330 XXXXX Package Code K : SOP-8 KA : SOP-8-P Operating Ambient Temp. Range E : -20 to 70 °C Handling Code TR : Tape & Reel Lead Free Code L : Lead Free Device Blank : Original Device XXXXX - Date Code Note: ANPEC lead-free products contain molding compounds/die attach materials and 100% matte tin plate termination finish; which are fully compliant with RoHS and compatible with both SnPb and lead-free soldiering operations. ANPEC lead-free products meet or exceed the lead-free requirements of IPC/JEDEC J STD-020C for MSL classification at lead-free peak reflow temperature. Pin Description PIN NAME VIN GND VCNTL I/O I O I DESCRIPTION Main power input pin. Connect this pin to a voltage source and an input capacitor. The APL5330 provides current from VIN pin to VOUT pin by controlling the NPN pass transistor. Signal ground. Power input pin for internal control circuitry. Connect this pin to a voltage source to provide a bias for the internal control circuitry. A bypass capacitor is usually connected near this pin. Reference voltage input and active-low shutdown control pin. Connect this pin to a resistor divider and a capacitor for soft-start and filtering noise purposes. Pulling and holding the voltage on this pin low by an open-drain transistor shuts down the output. Output pin of the regulator. Connect this pin to load. Output capacitors connected to this pin improves stability and transient response. The output voltage tracks the reference voltage, and the output pin provides the maximum current up to 2A. VREF I VOUT O Block Diagram VCNTL VIN VREF Voltage Regulation Thermal Limit Current Limit VOUT Shutdown GND Copyright © ANPEC Electronics Corp. Rev. A.1 - Jun., 2006 2 www.anpec.com.tw APL5330 Absolute Maximum Ratings Symbol VCNTL VIN PD TJ www.DataSheet4U.com Parameter VCNTL Supply Voltage, VCNTL to GND VIN Supply Voltage, VIN to GND Power Dissipation Junction Temperature Storage Temperature Soldering Temperature, 10 Seconds Minimum ESD Rating (Human Body Mode) Rating -0.2 ~ 7 -0.2 ~ 3.9 Internally Limited 150 -65 ~ 150 300 ±3 Unit V V W o o o C C C TSTG TSDR VESD kV Thermal Characteristics Symbol θJA θJC Parameter Junction-to-Ambient Thermal Resistance in Free Air SOP-8 SOP-8-P Junction-to-Case Thermal Resistance SOP-8 SOP-8-P Value 75 55 28 20 Unit o C/W o C/W Note : θJA is measured with the component mounted on a high effective thermal conductivity test board in free air. The exposed pad of SOP-8-P is soldered directly on the PCB. Recommended Operating Conditions Symbol VCNTL VIN VREF VOUT IOUT TJ Parameter VCNTL Supply Voltage (Note 1) VIN Supply Voltage (Note 2) VREF Input Voltage VOUT Output Voltage (Note 3) VOUT Output Current (Note 4) Junction Temperature Range 3.1 ~ 6 1.2 ~ 3.5 0.8 ~ 3 VREF ± 0.02 2 -20 ~ 125 Unit V V V V A o C Notes : 1. Please refer to the VCNTL-to-Vin Dropout Voltage in the “Typical Characteristics” section for the minimun supply voltage on VCNTL. 2. Please sup.


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