PJSMDA12-6

PJSMDA05-6 SERIES HEX TVS/ZENER ARRAY FOR ESD AND LATCH-UP PROTECTION This 6 TVS/Zener Array family have been designed to Protect Sensitive Equipment against ESD and to prevent Latch-Up events in CMOS circuitry operating at 5V, 12V, 15V and 24V. This TVS array offers an integrated solution to protect up to 6 data lines where the board space is a premium. P SPECIFICATION FEATURES 1 8 7 GND 6 GND 5 SOIC-8 350W Power Dissipation (8x20µsec Waveform) Low Leakage Current, Maximum of 5µA at rated voltage Very Low Clamping Voltage IEC61000-4-2 ESD 20kV air, 15kV Contact Compliance Packaged in the Industry Standard SOIC-8 2 3 4 APPLICATIONS RS-232C or RS-422 Communication ports GPIB/IEEE 485 Ports Portable Instrumentation 8 5 4 1 MAXIMUM RATINGS (Per Device) Rating Peak Pulse Power (8x20µsec Waveform) ESD Voltage (HBM) Operating Temperature Range Storage Temperature Range Symbol P pp V ESD TJ Tstg Value 350 >25 -50 to +125 -50 to +150 Units W kV °C °C ELECTRICAL CHARACTERISTICS (Per Device) Tj = 25°C PJSMDA05-6 Parameter Reverse Stand-Off Voltage Reverse Breakdown Voltage Reverse Leakage Current Clamping Voltage (8x20µsec) Clamping Voltage (8x20µsec) Off State Junction Capacitance Off State Junction Capacitance Symbol VWRM VBR IR Vcl Vcl Cj Cj I BR = 1mA VR = 5V I pp = 5A I pp = 24A 0 Vdc Bias f = 1MHz Between I/O pins and pin 6, 7 5 Vdc Bias f = 1MHz Between I/O pins and pin 6, 7 Conditions Min Typical Max 5 Units V V 6 5 9.8 13 225 125 µA V V pF pF 4/19/2005 Page ...