96S02 Datasheet PDF | Fairchild Semiconductor





96S02 Datasheet PDF Download

Part Number 96S02
Description DM96S02
Manufacture Fairchild Semiconductor
Total Page 7 Pages
PDF Download Download 96S02 Datasheet PDF

Features: DM96S02 Dual Retriggerable Resettable Mo nostable Multivibrator January 1992 Re vised June 1999 DM96S02 Dual Retrigger able Resettable Monostable Multivibrato r General Description The DM96S02 is a dual retriggerable and resettable monos table multivibrator. This one-shot prov ides excepw w w . D a t a S h e tionall y e t 4 wide U . delay c o range, m pul se width stability, predictable accurac y and immunity to noise. The pulse widt h is set by an external resistor and ca pacitor. Resistor values up to 2.0 MΩ for the DM96S02 reduce required capaci tor values. Hysteresis is provided on t he positive trigger input of the DM96S0 2 for increased noise immunity. Order Code: Order Number DM96S02M DM96S02N Pa ckage Number M16A N16E Package Descript ion 16-Lead Small Outline Integrated Ci rcuit (SOIC), JEDEC MS-012, 0.150 Narro w 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devic es also available in Tape and Reel. Spe cify by appending the suffix letter “X” to the ordering code. Lo.

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96S02 datasheet
January 1992
Revised June 1999
DM96S02
Dual Retriggerable Resettable Monostable Multivibrator
General Description
The DM96S02 is a dual retriggerable and resettable
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This one-shot provides excep-
pulse width stability, predictable
accuracy and immunity to noise. The pulse width is set by
an external resistor and capacitor. Resistor values up to 2.0
Mfor the DM96S02 reduce required capacitor values.
Hysteresis is provided on the positive trigger input of the
DM96S02 for increased noise immunity.
Order Code:
Order Number Package Number
Package Description
DM96S02M
M16A
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
DM96S02N
N16E
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Diagram
Connection Diagram
VCC = Pin 16
GND = Pin 8
Pin Descriptions
Pin Names
Description
I0 Trigger Input (Active Falling Edge)
I1 Schmitt Trigger Input (Active Rising-Edge)
CD
Q1 - 2
Direct Clear Input (Active-LOW)
True Pulse Output
Q1 - 2
Complementary Pulse Output
CX1, 2
RX1,2
External Capacitor Connection
External Resistor Connection
Triggering Truth Table
Pin Number
5(11)
4(12)
3(13)
HL
L
H
H LH H
XXL
H = HIGH Voltage Level VIH
L = LOW Voltage Level VIL
X = Immaterial (either H or L)
H L = HIGH-to-LOW Voltage Level transition
L H = LOW-to-HIGH Voltage Level transition
Operation
Trigger
Trigger
Reset
© 1999 Fairchild Semiconductor Corporation DS009810.prf
www.fairchildsemi.com

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