MPC9658

MOTOROLA Freescale Semiconductor, Inc. SEMICONDUCTOR TECHNICAL DATA Order Number: MPC9658/D Rev 3, 02/2003 3.3V 1:10 LVCMOS PLL Clock Generator MPC9658 The MPC9658 is a 3.3V compatible, 1:10 PLL based clock generator and zero-delay buffer targeted for high performance low-skew clock distribution in mid-range to high-performance telecom, networking and computing applications. With output frequencies up to 250 MHz and output skews less than 120 ps the device meets the needs of the most demanding clock applications. The MPC9658 is specified for the temperature range of 0°C to +70°C. Features www.DataSheet4U.com 1:10 PLL based low-voltage clock generator LOW VOLTAGE 3.3V LVCMOS 1:10 PLL CLOCK GENERATOR Freescale Semiconductor, Inc... Pin and function compatible to the MPC958 Functional Description The MPC9658 utilizes PLL technology to frequency lock its outputs FA SUFFIX onto an input reference clock. Normal operation of the MPC9658 requires 32 LEAD LQFP PACKAGE CASE 873A the connection of the QFB output to the feedback input to close the PLL feedback path (external feedback). With the PLL locked, the output frequency is equal to the reference frequency of the device and VCO_SEL selects the operating frequency range of 50 to 125 MHz or 100 to 250 MHz. The two available post-PLL dividers selected by VCO_SEL (divide-by-2 or divide-by-4) and the reference clock frequency determine the VCO frequency. Both must be selected to match the VCO frequency range. The internal VCO ...