UT7R995

Standard Products UT7R995 & UT7R995C RadClockTM RadHard 2.5V/3.3V 200MHz High-Speed Multi-phase PLL Clock Buffer Datasheet February, 2007 FEATURES: +3.3V Core Power Supply +2.5V or +3.3V Clock Output Power Supply Independent Clock Output Bank Power Supplies www.DataSheet4U.com Output frequency range: 6 MHz to 200 MHz Bank pair output-output skew < 100 ps Cycle-cycle jitter < 50 ps 50% ± 2% maximum output duty cycle at 100MHz Eight LVTTL outputs with selectable drive strength Selectable positive- or negative-edge synchronization Selectable phase-locked loop (PLL) frequency range and lock indicator Phase adjustments in 625 to 1300 ps steps up to ± 7.8 ns (1-6,8,10,12) x multiply and (1/2,1/4) x divide ratios Compatible with Spread-Spectrum reference clocks Power-down mode Selectable reference input divider Radiation performance - Total-dose tolerance: 100 krad (Si) - SEL Immune to a LET of 109 MeV-cm2/mg - SEU Immune to a LET of 109 MeV-cm2/mg Military temperature range: -55oC to +125oC Extended industrial temp: -40oC to +125oC Packaging options: - 48-Lead Ceramic Flatpack Standard Microcircuit Drawing: 5962-05214 - QML-Q and QML-V compliant part The devices also feature split output bank power supplies that enable banks 1 & 2, bank 3, and bank 4 to operate at a different power supply levels. The ternary PE/HD pin controls the synchronization of output signals to either the rising or the falling edge of the reference clock and selects the drive strength of the output buffers...