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iT6145 Dataheets PDF



Part Number iT6145
Manufacturers Iterra
Logo Iterra
Description Duobinary encoder and driver amplifier
Datasheet iT6145 DatasheetiT6145 Datasheet (PDF)

iT6145 Duobinary Encoder and Driver Amplifier (Preliminary Information) Description The iT6145 combines a duobinary encoder, driver amplifier, and fifth-order Bessel lowpass filter in a compact module. It is designed for use in the transmitters (transponders) of long-haul duobinary optical communication links. The microchip module is suitable for use in standard 300-pin MSA modules and is housed in a rugged enclosure. The output of the iT6145 is a duobinary encoded signal with the correct bandwi.

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iT6145 Duobinary Encoder and Driver Amplifier (Preliminary Information) Description The iT6145 combines a duobinary encoder, driver amplifier, and fifth-order Bessel lowpass filter in a compact module. It is designed for use in the transmitters (transponders) of long-haul duobinary optical communication links. The microchip module is suitable for use in standard 300-pin MSA modules and is housed in a rugged enclosure. The output of the iT6145 is a duobinary encoded signal with the correct bandwidth and amplitude to directly drive a M-Z optical modulator. The output level is adjustable from 5 to 9 Vpp to allow for variations in modulator Vpi. An internal detector provides a temperature-stable DC voltage that is proportional to the output data amplitude, facilitating the use of AGC loops to set the output level. The clock and data inputs can be driven either differentially for maximum sensitivity, or single ended with the unused inputs terminated in 50 ohms. ™Complete, compact duo-binary transmitter solution ™Adjustable output voltage from 5.0 to 9.0 Vpp ™Power dissipation: 5 W ™16-mm SMT ceramic package with bottom pad grounding and heat sinking ™Differential data and clock inputs ™Integral output level detector for AGC loop control www.DataSheet4U.com Features Device Diagram Absolute Maximum Ratings Symbol Vsig_max V8_max V-5_max Tc_max_op Tc_max_st Parameter Clock/data input +8 VDC supply input -5 VDC supply input Case temperature (operating) Storage temperature Minimum Vcc-2 Maximum Vcc+0.6 10 Unit V V V -10 75 125 o C oC www.iterrac.com This is a Preliminary data sheet. See “Product Status Definitions” on Web site or catalog for product development status. February 28, 2006 Doc. 4085 Rev 0 1 iTerra Communications 2400 Geng Road, Ste. 100, Palo Alto, CA 94303 Phone (650) 424-1937, Fax (650) 424-1938 iT6145 Duobinary Encoder and Driver Amplifier (Preliminary Information) Electrical Characteristics At ambient temperature # 1 2 3 Parameter Input data rate Input clock frequency Input amplitude (clock and data) Data-clock phase margin Long pulse droop (from low-frequencycutoff) Maximum output voltage amplitude Minimum output voltage amplitude Power detector output Level adjust input 8 V supply current -5.0 V supply Symbol DIN_dr CLK_f Vin_pp Differential Jitter degradation from optimum setting of TBD ps Vout at end of pulse Vout at start of 1 µs pulse Conditions Min. 9.9 9.9 0.3 Typ. Max. 11.1 11.1 1.0 Unit Gb/s GHz Vpp www.DataSheet4U.com 4 PH_d-c TBD ps 5 DROOP 0.46 6 Vout_max Level adjust control set for max. Level adjust control set to min. 7 Vpp output 9.0 Vpp 7 Vout_min 5.0 Vpp 8 9 10 11 Vdet V_amp +8 V -5 V -170 5 to 12 mV V 600 40 mA mA Output set to 9 Vpp Output set to 9.0 Vpp Eye Specifications # 1. See Jitter Definition (p. 3). 2. See Eye Skew Definition (p. 3). 3. See Eye Opening Definition (p. 3) +1EO = Va/Vb*100. 4. See Eye Opening Definition (p. 3) -1EO = Vc/Vd*100. 5. See Half Clock Amplitude Ra.


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