UDA1352HL

INTEGRATED CIRCUITS DATA SHEET www.DataSheet4U.com UDA1352HL 48 kHz IEC 60958 audio DAC Preliminary specification Supersedes data of 2002 May 22 2003 Mar 25 Philips Semiconductors Preliminary specification 48 kHz IEC 60958 audio DAC CONTENTS 1 1.1 1.2 1.3 1.4 2 www.DataSheet4U.com 3 4 5 6 7 8 8.1 8.2 8.3 8.4 8.5 8.6 8.7 9 9.1 9.2 9.3 9.4 9.5 9.6 10 10.1 10.2 10.3 10.4 10.5 10.6 10.7 10.8 10.9 10.10 10.11 11 11.1 11.2 11.3 11.4 FEATURES General Control IEC 60958 input Digital sound processing and DAC APPLICATIONS GENERAL DESCRIPTION ORDERING INFORMATION QUICK REFERENCE DATA BLOCK DIAGRAM PINNING FUNCTIONAL DESCRIPTION Operating modes Clock regeneration and lock detection Crystal oscillator Mute Auto mute Data path Control L3-BUS DESCRIPTION General Device addressing Register addressing Data write mode Data read mode Initialization string I2C-BUS DESCRIPTION Characteristics of the I2C-bus Bit transfer Byte transfer Data transfer Start and stop conditions Acknowledgment Device address Register address Write and read data Write cycle Read cycle SPDIF SIGNAL FORMAT SPDIF channel encoding SPDIF hierarchical layers for audio data SPDIF hierarchical layers for digital data Timing characteristics 12.7 12.8 12.9 12.10 12.11 12.12 12.13 12.14 12.15 13 14 15 16 17 18 19 19.1 19.2 19.3 19.4 19.5 20 21 22 23 12 12.1 12.2 12.3 12.4 12.5 12.6 REGISTER MAPPING UDA1352HL Clock settings (write) I2S-bus output settings (write) I2S-bus input settings (write) Power-down settings (write) Volum...