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TD62C852PG Dataheets PDF



Part Number TD62C852PG
Manufacturers Toshiba Semiconductor
Logo Toshiba Semiconductor
Description (TD62C851PG / TD62C852PG) 8BIT SERIAL-IN PARALLEL-OUT SHIFT REGISTER / LATCH DRIVERS
Datasheet TD62C852PG DatasheetTD62C852PG Datasheet (PDF)

TD62C851,852PG TOSHIBA Bi−CMOS INTEGRATED CIRCUIT SILICON MONOLITHIC TD62C851PG,TD62C852PG 8BIT SERIAL−IN PARALLEL−OUT SHIFT REGISTER / LATCH DRIVERS The TD62C851PG and TD62C852PG are monolithic circuits designed to be used together with Bi−CMOS integrated circuits. The devices consist of a 8bit shift register, 8bit latches, and 8 output circuits (integral clamp diodes for switching inductive loads). The suffix (G) appended to the part number represents a Lead (Pb)-Free product. FEATURES z 8bi.

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TD62C851,852PG TOSHIBA Bi−CMOS INTEGRATED CIRCUIT SILICON MONOLITHIC TD62C851PG,TD62C852PG 8BIT SERIAL−IN PARALLEL−OUT SHIFT REGISTER / LATCH DRIVERS The TD62C851PG and TD62C852PG are monolithic circuits designed to be used together with Bi−CMOS integrated circuits. The devices consist of a 8bit shift register, 8bit latches, and 8 output circuits (integral clamp diodes for switching inductive loads). The suffix (G) appended to the part number represents a Lead (Pb)-Free product. FEATURES z 8bit serial−in parallel−out shift register / latch driver (Bi−CMOS process) www.DataSheet4U.com z Output sustaining voltage ; 50 V z Output current ; TD62C851PG 200 mA / ch (Low saturation type) TD62C852PG 500 mA / ch (darlington type) z Built−in output clamp diodes z CMOS compatible inputs z Package ; DIP20−P−300A Weight: 2.25 g (typ.) PIN CONNECTION (TOP VIEW) 1 2006-06-14 TD62C851,852PG BLOCK DIAGRAM www.DataSheet4U.com TIMING DIAGRAM 2 2006-06-14 TD62C851,852PG EQUIVALENT OF INPUTS AND OUTPUTS S−IN, clock terminal equivalent circuits LATCH , RESET terminal equivalent circuits ENABLE terminal equivalent circuits S−OUT terminal equivalent circuits www.DataSheet4U.com Output terminal equivalent circuits (TD62C851PG) Output terminal equivalent circuits (TD62C852PG) Note: The output parasitic diode cannot be used as clamp diode. 3 2006-06-14 TD62C851,852PG TRUTH TABLE CK E L L L H (*) (*) (*) (*) H R H H H H (*) L LATCH H H L (*) (*) H L S−IN L H (*) (*) (*) (*) (*) OUT O1 OFF ON NC OFF NC OFF NC On On - 1 On - 1 NC NC NC OFF NC S−OUT Q7 Q7 Q7 Q7 Q7 L L www.DataSheet4U.com CK = CLOCK E = ENABLE R = RESET LATCH = LATCH S−IN = SERIAL IN OUT = PARALLEL OUT S−OUT = SERIAL OUT (*) = DON’T CARE NC = NO CHANGE L = LOW LEVEL H = HIGH LEVEL ABSOLUTE MAXIMUM RATINGS (Ta = 25°C) CHARACTERISTIC Supply Voltage Output Sustaining Voltage Output Current Input Voltage Power Dissipation Operating Temperature Storage Temperature TD62C851PG TD62C852PG SYMBOL VDD VCE (SUS) IOUT VIN PD Topr Tstg RATING −0.3~7.0 −0.5~50 200 500 ~0.4~VDD + 0.3 1.47 −40~85 −55~150 UNIT V V mA / ch V W °C °C 4 2006-06-14 TD62C851,852PG RECOMMENDED OPERATING CONDITIONS (Ta = −40~85°C) CHARACTERISTIC Supply Voltage Input Voltage Output Current (“H” Level) Output Voltage (“L” Level) S−OUT On S−OUT SYMBOL VDD VIN IOH VOH Ta = 25°C ― ― DC 1 circuit, Ta = 25°C TD62C 851PG Output Current (“L” Level) TD62C 852PG On IOL 8 circuit on Tpw = 25 ms Ta = 85°C VDD = 5.5 V Duty = 10% Duty = 40% CONDITION ― ― MIN 4.5 0 ― 0 ― 0 0 0 0 0 0 1.5 0.33 100 100 0 0 0 TYP. 5.0 ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― MAX 5.5 VDD −0.4 50 0.4 160 160 95 400 400 170 ― ― ― ― 50 160 400 MHz µs ns ns V mA mA / ch UNIT V V mA V D C 1 circuit, Ta = 25°C 8 circuit on Tpw = 25 ms Ta = 85°C VDD = 5.5 V fCLOCK fw CLOCK tsetup thold VR IF Duty = 10% Duty = 50% ― ― ― ― ― ― ― www.DataSheet4U.com Clock Frequency Clock Pulse Width Data Set Up Time Data Hold Time Clamp Diode Reverse Voltage Clamp Diode Forward Current TD62C851PG TD62C852PG 5 2006-06-14 TD62C851,852PG ELECTRICAL CHARACTERISTICS (Ta = −40~85°C) CHARACTERISTIC “H” Level Input Voltage “L” Level “H” Level Input Current “L” Level VIL IIH IIL IIN “H” Level S−OUT S−OUT Output Voltage TD62C 851P On TD62C 852P Output Current “H” Level On IOH IDD1 IDD2 Operating Supply Current TD62C851PG TD62C852PG Clamp Diode Reverse Current Clamp Diode Froward Voltage TD62C851PG TD62C852PG IDD3 IR VF ― ― VR = 50 V IF = 160 mA IF = 400 mA ― VOH ― ― ― ― ― ― ENABLE, VDD = 5.5 V VIH = VDD LATCH, RESET VDD = 5.5 V, VIL = GND CLOCK, S−IN VIN = VCC or GND VDD = 4.5 V IOH = −10 µA IOL = 0.8 mA IOL = 100 mA VOL ― VDD = 4.5 V IOL = 160 mA IOL = 250 mA IOL = 400 mA VDD = 5.5 V, VOH = 50.0 V ENABLE = “H” fCLK = 1 MHz Output open DATA = 1 / 2 ENABLE = “H” 1 circuit on fCLK = 1 MHz ENABLE = “L” SYMBOL VIH TEST CIR− CUIT ― TEST CONDITION ― MIN 0.7 VDD ― 28 −55 ― 3.9 ― ― ― ― ― ― ― TYP. ― ― 55 −110 ― 4.1 0.2 0.29 0.39 1.24 1.54 ― 130 MAX ― 0.3 VDD 110 −275 ±1.0 ― 0.4 0.50 0.65 1.90 2.30 100 200 µA V V µA V UNIT www.DataSheet4U.com “L” Level ― VDD = 5.5 V Ta = 25°C ― 2.0 5.0 mA ― ― ― ― ― 35 1.0 ― 1.0 1.5 40 1.5 50 2.0 2.0 µA V 6 2006-06-14 TD62C851,852PG SWITCHING CHARACTERISTICS (Ta = 25°C) CHARACTERISTIC CK−S−OUT CK− On Low−to −High L− On R− On Propagation Delay Time E− On CK−S−OUT CK− On High−to −Low L− On R−S−OUT E− On Maximum Clock Frequency CLOCK Minimum Pulse Width www.DataSheet4U.com LATCH RESET Data Set Up Time Data Hold Time Maximum Clock Rise Time Maximum Clock Fall Time fMAX twCK twL twR tsetup thold tr tf ― ― ― tpHL ― VDD = 5.0 V, VIH = 5.0 V VIL = 0 V, Duty = 50% RL = 300 Ω (TD62C851) 120 Ω (TD62C852) tpLH ― SYMBOL TEST CIR− CUIT TEST CONDITION MIN ― ― ― ― ― ― ― ― ― ― 1.5 ― ― ― ― ― ― ― TYP. 0.40 1.80 2.10 1.50 1.50 0.33 0.41 0.30 0.25 0.21 2.0 250 116 107 30 14 70 70 MAX 0.65 3.00 3.50 2.50 2.50 0.55 0.70 0.50 0.42 0.35 ― 330 160 140 60 40 ― ― ns ns MHz µs UNIT ― ns 7 2006-06-14 TD62C851,852PG TD62C851PG TD62C851PG w.


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