MX26L12811MC

MX26L12811MC 128M [x8/x16] SINGLE 3V PAGE MODE MTP MEMORY FEATURES 3.0V to 3.6V operation voltage Block Structure - 128 x 128Kbyte Erase Blocks Fast random / page mode access time - 120/25 ns Read Access Time (page depth:4-word) 32-Byte Write Buffer www.DataSheet4U.com - 6 us/byte Effective Programming Time High Performance - Block erase time: 2s typ. - Byte programming time: 210us typ. - Block programming time: 0.8s typ. (using Write to Buffer Command) Program/Erase Endurance cycles: 10 cycles Packaging Performance Low power dissipation - typical 15mA active current for page mode read - 80uA/(max.) standby current - 44-Lead SOP Technology - Nbit (0.25u) MTP Technology GENERAL DESCRIPTION The MXIC's MX26L12811MC series MTP use the most advance 2 bits/cell Nbit technology, double the storage capacity of memory cell. The device provide the high density MTP memory solution with reliable performance and most cost-effective. The device organized as by 8 bits or by 16 bits of output bus. The device is packaged in 44-Lead SOP. It is designed to be reprogrammed and erased in system or in standard EPROM programmers. The device offers fast access time and allowing operation of high-speed microprocessors without wait states. The device augment EPROM functionality with in-circuit electrical erasure and programming. The device uses a command register to manage this functionality. The MXIC's Nbit technology reliably stores memory contents even after the specific erase and ...