MN101CF96D

MN101CF96D, MN101CF96F Type Internal ROM type ROM (byte) RAM (byte) Package (Lead-free) 64K 3K LQFP064-P-1414 (Under planning) [Standard] 0.2 µs (at 2.7 V to 3.6 V, 10 MHz) 0.5 µs (at 2.7 V to 3.6 V, 4 MHz) 62.5 µs (at 2.7 V to 3.6 V, 32 kHz) [Double speed] 0.1 µs (at 2.7 V to 3.6 V, 10 MHz) MN101CF96D FLASH 96K 6K MN101CF96F Minimum Instruction Execution Time www.DataSheet4U.com  Interrupts RESET, Watchdog, External 0 to 5, Timer 0 to 8, Time base, Serial 0 reception, Serial 0 transmission, Serial 1 reception, Serial 1 transmission, Serial 2, Serial 3, Automatic transfer finish, A/D conversion finish, Key interrupts (8 lines) Timer counter 0 : 8-bit × 1 (square-wave/8-bit PWM output, event count, pulse width measurement, serial clock output, real-time output control, generation of remote control carrier) Clock source................ 1/2, 1/4 of system clock frequency; 1/1, 1/4, 1/16, 1/32, 1/64 of OSC oscillation clock frequency; 1/1 of XI oscillation clock frequency; external clock input Interrupt source ........... coincidence with compare register 0 Timer counter 1 : 8-bit × 1 (square-wave output, event count, synchronous output event, serial clock output) Clock source................ 1/2, 1/8 of system clock frequency; 1/1, 1/4, 1/16, 1/64, 1/128 of OSC oscillation clock frequency; 1/1 of XI oscillation clock frequency; external clock input Interrupt source ........... coincidence with compare register 1 Timer counter 0, 1 can be cascade-connected.  Timer Counter Ti...