C8051F236

C8051F236 25 MIPS, 8 kB Flash, 48-Pin Mixed-Signal MCU Analog Peripherals Two comparators High-Speed 8051 µC Core - - Programmable hysteresis Configurable to generate interrupts or reset VDD Monitor and Brown-out Detector Pipelined instruction architecture; executes 70% of instructions in 1 or 2 system clocks Up to 25 MIPS throughput with 25 MHz system clock Expanded interrupt handler; up to 21 interrupt sources 1280 bytes data RAM 8 kB Flash; in-system programmable in 512 byte sectors (512 bytes are reserved) 32 port I/O; all are 5 V tolerant Hardware SPI™ and UART serial ports available concurrently 3 general-purpose 16-bit counter/timers Dedicated watchdog timer; bidirectional reset Internal programmable oscillator: 2–16 MHz External oscillator: Crystal, RC, C, or Clock Can switch between clock sources on-the-fly On-Chip JTAG Debug Memory On-chip emulation circuitry facilitates full-speed, non-intrusive, in-circuit emulation Supports breakpoints, single stepping, watchpoints, inspect/modify memory, and registers Superior performance to emulation systems using ICE-chips, target pods, and sockets Fully compliant with IEEE 1149.1 specification Digital Peripherals - Typical operating current: 9 mA at 25 MHz www.DataSheet4U.com Typical stop mode current: <0.1 uA Supply Voltage: 2.7 to 3.6 V Clock Sources 48-Pin TQFP - Temperature Range: –40 to +85 °C VDD VDD GND GND NC NC NC Analog/Digital Power Port 0 Latch UART Timer 0 Timer 1 Timer 2 P 0 M U X P 0 D r v P...