P4C165

P4C165 ULTRA HIGH SPEED 8K x 8 RESETTABLE STATIC CMOS RAM FEATURES Full CMOS, 6T Cell High Speed (Equal Access and Cycle Times) – 15/20/25 ns (Commercial) – 20/25/35 (Industrial) Low www.DataSheet4U.com Power Operation Output Enable and Dual Chip Enable Control Functions Single 5V±10% Power Supply Common Data I/O Fully TTL Compatible Inputs and Outputs Standard Pinout (JEDEC Approved) – 28-Pin Plastic DIP (300 mil) Chip Clear Function DESCRIPTION The P4C165 is a 65,536-bit ultra high-speed static RAM organized as 8K x 8. The RAM features a reset control to enable clearing all words to zero within two cycle times. The CMOS memory requires no clocks or refreshing and has equal access and cycle times. Inputs are fully TTLcompatible. The RAM operates from a single 5V±10% tolerance power supply. Access times as fast as 15 nanoseconds are available, permitting greatly enhanced system operating speeds. In full standby mode with CMOS inputs, power consumption is only 5.5 mW for the P4C165. The P4C165 is available in a 28-pin 300 mil DIP. FUNCTIONAL BLOCK DIAGRAM PIN CONFIGURATION 1519B DIP (P5) Document # SRAM117 Rev OR 1 Revised October 2005 P4C165 MAXIMUM RATINGS(1) Symbol VCC Parameter Power Supply Pin with Respect to GND Terminal Voltage with Respect to GND (up to 7.0V) Operating Temperature Value –0.5 to +7 –0.5 to VCC +0.5 –55 to +125 Unit V Symbol TBIAS TSTG PT IOUT Parameter Temperature Under Bias Storage Temperature Power Dissipation DC Output Current Value –55 to +...