BINARY COUNTER/REGISTER. 74HC691 Datasheet

74HC691 COUNTER/REGISTER. Datasheet pdf. Equivalent

Part 74HC691
Description (74HC690 - 74HC693) 4 BIT BINARY COUNTER/REGISTER
Feature M54/74HC690/691 M54/74HC692/693 HC690/692 DECADE COUNTER/REGISTER (3-STATE) HC691/693 4 BIT BINARY C.
Manufacture STMicroelectronics
Datasheet
Download 74HC691 Datasheet

M54/74HC690/691 M54/74HC692/693 HC690/692 DECADE COUNTER/REG 74HC691 Datasheet
Recommendation Recommendation Datasheet 74HC691 Datasheet





74HC691
M54/74HC690/691
M54/74HC692/693
HC690/692 DECADE COUNTER/REGISTER (3-STATE)
HC691/693 4 BIT BINARY COUNTER/REGISTER (3-STATE)
. HIGH SPEED
fMAX = 50 MHz (TYP.) at VCC = 5 V
. LOW POWER DISSIPATION
www.DataSheet4U.coImCC = 4 µA (MAX.) at TA = 25 °C
. HIGH NOISE IMMUNITY
VNIH = VNIL = 28 % VCC (MIN.)
. OUTPUT DRIVE CAPABILITY
. 15 LSTTL LOADS (for QA to QD)
10 LSTTL LOADS (for RCO)
SYMMETRICAL OUTPUT IMPEDANCE
IOH= IOL = 6 mA (MIN.) (for QA to QD)
IOH= IOL = 4 mA (MIN.) (for RCO)
. BALANCED PROPAGATION DELAYS
tPLH = tPHL
. WIDE OPERATING VOLTAGE RANGE
VCC (OPR) = 2 V to 6 V
. PIN AND FUNCTION COMPATIBLE
WITH LSTTL 54/74LS690/691
B1R
(Plastic Package)
F1R
(Ceramic Package)
M 1R
(Micro Package)
C1R
(Chip Carrier)
ORDER CODES :
M54HCXXXF1R M74HCXXXM1R
M74HCXXXB1R M74HCXXXC1R
DESCRIPTION
The HC690/691/692/693 are high speed CMOS
COUNTER/REGISTER fabricated in silicon gate
C2MOS technology.
They have the same high speed performance of
LSTTL combined with true CMOS low power con-
sumption.
The internal circuit is composed of 3 stages includ-
ing buffer output, which offers high noise immunity
and stable output. These devices incorporate a syn-
chronous counter, four-bit D-type register, and
quadruple two-line to one-line multiplexers with
three-state outputs in a single 20-pin package. The
counter can be programmed from the data inputs
and have enable P and enable T inputs and a ripple-
carry output for easy expansion. The regis-
ter/counter select input, R/C, selects the counter
when low or the register when high for the three-
state outputs, QA, QB, QC, and QD.
If the LOAD input (LOAD) is held ”L” DATA input (A-
D) are loaded in to the internal counter at positive
edge of counter clock input (CCK). In the counter
mode, internal counter counts up at the positive of
the counter clock. If the counter clear input (CCLR)
is held ”L”, the internal counter is cleared ( synchron-
ously to the counter clock for HC692/HC693, and
asynchronously for HC690/HC691). The internal
PIN CONNECTIONS (top view)
NC =
No Internal
Connection
March 1993
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74HC691
M54/M74HC690/691/692/693
counter’s outputs are stored in the output register at
the positive edge of the register clock (RCK). If the
register clear input (RCLR) is held ”L” the register is
cleared (synchronously to register clock for
HC692/HC693 and asynchronously for
HC690/HC691). All inputs are equipped with protec-
tion circuits against static discharge and transient
excess voltage.
INPUT AND OUTPUT EQUIVALENT CIRCUIT
www.DataSheet4U.com
PIN DESCRIPTION
PIN No
3 to 6
7, 14
15 to 18
1
2
11
8
9
19
10
20
SYMBOL
A to D
ENT, ENP
QA to QD
CCLR
CCK
R/C
RCLR
RCK
RCO
GND
VCC
NAME AND FUNCTION
Data Inputs
Enable Inputs
Data Outputs
Counter Clear (Active
LOW)
Counter Clock
Counter/ Register Select
Register Clear (Active
LOW)
Register Clock
Ripple Counter Output
Ground (0V)
Positive Supply Voltage
IEC LOGIC SYMBOLS
HC690
HC691
HC692
HC693
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