Application Note. AN2903 Datasheet

AN2903 Note. Datasheet pdf. Equivalent

Part AN2903
Description Application Note
Feature Freescale Semiconductor Application Note AN2903 Rev. 6, 10/2007 MSC8126 Design Checklist by Tina R.
Manufacture Motorola
Datasheet
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AN2903
Freescale Semiconductor
Application Note
AN2903
Rev. 6, 10/2007
MSC8126 Design Checklist
by Tina Redheendran
www.DataSheet4U.com
This application note provides a set of recommendations to
assist you in a first-time design with the MSC8126 device. This
document can also be useful as a general guideline for
designing new systems because it highlights the aspects of a
design that merit special attention during initial system start-up.
1 Getting Started
During the first phase of designing a system with the MSC8126
device, your main tasks are to make the pin assignments and
configure the reset parameters. Before you get started, you
should be familiar with the available documentation, silicon
revisions, software, models, and tools. Refer to Section 9,
Related Reading, on page 18.
1.1 Pin Assignments
CONTENTS
1 Getting Started.............................................................1
1.1 Pin Assignments ..........................................................1
1.2 Configuring Reset Parameters .....................................2
2 Power ...........................................................................4
3 Clocks ..........................................................................5
4 Reset ............................................................................5
4.1 Power-On-Reset Circuit...............................................5
4.2 Reset Configuration Pins .............................................6
4.3 Boot..............................................................................7
5 Bit and Byte Lane Ordering.........................................8
6 Memory .......................................................................9
6.1 60x Bus Signals and Memory Transactions ................9
6.2 BADDRx in 60x Mode ..............................................10
6.3 Bank Selects Versus Address Lines...........................10
6.4 Bank Versus Page Interleaving..................................10
7 EOnCE/JTAG Interface.............................................10
8 Signal Terminations...................................................12
9 Related Reading.........................................................18
Some MSC8126 pins are multiplexed, depending on the device
programming. Take care in programming MSC8126 registers to
configure these multiplexed pins as needed for your system
design. A signal function should be routed to a single pin, so
any other pins providing that signal functionality should have it
turned off. Pin multiplexing is configured in the following
registers:
• Hard Reset Configuration Word (HRCW)
• SIU module configuration register (SIUMCR)
• Memory controller registers ORx and BRx
• GPIO port registers.
© Freescale Semiconductor, Inc., 2004, 2007. All rights reserved.



AN2903
Getting Started
Some signals have one function during reset but switch to another multiplexed function during regular operation.
These signals include SWTE, DSISYNC, DSI64, MODCK[1–2], and CNFGS. These signals switch to DSI functionality
after the system exits the reset state.
Table 1 shows an overview of the multiplex options for the TDM interface, DSI bus, system bus, and Ethernet
controller. The pins are chosen based on the settings of the DSI reset configuration pin, the ETHSEL bit in the Hard
Reset Configuration Word, and the EN and IFMODE bits in the Ethernet MIIGSK configuration registers. There
are two options for the location of the Ethernet pins: exposed on the low part of the DSI/system bus or exposed on
the GPIO pins. Even though the pins are repeated in each option, the options cannot be mixed. All Ethernet pins
must be from the DSI/system bus or from the GPIO pins. You cannot choose some of the Ethernet pins from the
DSI/system bus and the others from the GPIO pins. The SMII mode of the Ethernet controller is available only on
the GPIO pins. Table 1 also indicates which TDMs are available on the GPIO pins when the different Ethernet
options are chosen.
Table 1. Multiplexing Overview
Configuration
www.DataSh(DRePSeeiIns6t)e44tU.cE(oHTmRHCSWEL)
EN
(MIIGSK_ENR)
00
0
00
1
00
00
1
1
01
01
0
1
01
01
1
1
10
10
0
1
10
1
10
11
1
x
IFMODE
TDMs DSI Bus
(MIIGSK_CFGR) Available Width
xx
0,1,2,3
32 bit
00 0,1
32 bit
10
0,1,3
32 bit
01
0,1,3
32 bit
xx
0,1,2,3
32 bit
00
0,1,2,3
32 bit
10
0,1,2,3
32 bit
01
0,1,2,3
32 bit
xx
0,1,2,3
64 bit
00 0,1
64 bit
10
0,1,3
64 bit
01
0,1,3
64 bit
xx
0,1,2,3
64 bit
Pins
System
Bus
Width
64 bit
64 bit
64 bit
64 bit
32 bit
32 bit
32 bit
32 bit
32 bit
32 bit
32 bit
32 bit
32 bit
Ethernet on
DSI/System
Bus
MII
RMII
Ethernet
on GPIO
Pins
MII
RMII
SMII
MII
RMII
SMII
1.2 Configuring Reset Parameters
Review the HRCW to determine initial power-on-reset parameters, such as single MSC8126 bus mode versus
60x–compatible bus mode, boot port size, and on, and then set the bits for your application (see Table 2).
MSC8126 Design Checklist, Rev. 6
2 Freescale Semiconductor





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