CY7C9915 Datasheet: 3.3V Programmable Skew Clock Buffer





CY7C9915 3.3V Programmable Skew Clock Buffer Datasheet

Part Number CY7C9915
Description 3.3V Programmable Skew Clock Buffer
Manufacture Cypress Semiconductor
Total Page 14 Pages
PDF Download Download CY7C9915 Datasheet PDF

Features: PRELIMINARY CY7C9915 3.3V Programmable Skew Clock Buffer Features • All out put pair skew <100 ps (typical) • Inp ut Frequency Range: 3.75 MHz to 150 MHz • Output Frequency Range: 3.75 MHz t o 150 MHz • User-selectable output fu nctions — Selectable skew to 18 ns Inverted and non-inverted — Operati on at 1⁄2 and 1⁄4 input frequency Operation at 2x and 4x input frequen cy (input as low as 3.75 MHz) Function al Description The CY7C9915 RoboClock i s a 150-MHz Low-voltage Programmable Sk ew Clock Buffer that offers user-select able control over system clock function s. This multiple-output clock driver pr ovides the system integrator with funct ions necessary to optimize the timing o f high-performance computer systems. Ei ght individual drivers, arranged as fou r pairs of user-controllable outputs, c an each drive terminated transmission l ines with impedances as low as 50Ω wh ile delivering minimal and specified ou tput skews and full-swing logic levels (LVTTL). Each output can be hardwired to one o.

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PRELIMINARY
CY7C9915
3.3V Programmable Skew Clock Buffer
Features
• All output pair skew <100 ps (typical)
• Input Frequency Range: 3.75 MHz to 150 MHz
• Output Frequency Range: 3.75 MHz to 150 MHz
• User-selectable output functions
— Selectable skew to 18 ns
— Inverted and non-inverted
— Operation at 12 and 14 input frequency
— Operation at 2x and 4x input frequency (input as low
as 3.75 MHz)
www.DataSheZerto4Uin.pcuotm-to-output delay
• 3.3V power supply
• ± 3.0% Output Duty Cycle Distortion
LVTTL outputs drive 50terminated lines
• Low operating current
• 32-pin PLCC package
• Jitter < 100ps peak-to-peak (< 15 ps RMS)
Block Diagram
TEST
FB
REF
PHASE
FREQ FILTER
DET
FS
VCO AND
TIME UNIT
GENERATOR
4F0
4F1 SELECT
INPUTS
(THREE
3F0 LEVEL)
3F1
2F0
2F1
SKEW
SELECT
MATRIX
1F0
1F1
4Q0
4Q1
3Q0
3Q1
2Q0
2Q1
1Q0
1Q1
Functional Description
The CY7C9915 RoboClock is a 150-MHz Low-voltage
Programmable Skew Clock Buffer that offers user-selectable
control over system clock functions. This multiple-output clock
driver provides the system integrator with functions necessary
to optimize the timing of high-performance computer systems.
Eight individual drivers, arranged as four pairs of user-control-
lable outputs, can each drive terminated transmission lines
with impedances as low as 50while delivering minimal and
specified output skews and full-swing logic levels (LVTTL).
Each output can be hardwired to one of nine delay or function
configurations. Delay increments of 0.42 to 1.6 ns are deter-
mined by the operating frequency with outputs able to skew up
to ±6 time units from their nominal “zero” skew position. The
completely integrated PLL allows external load and trans-
mission line delay effects to be canceled. When this “zero
delay” capability of the LVPSCB is combined with the
selectable output skew functions, the user can create
output-to-output delays of up to ±12 time units.
Divide-by-two and divide-by-four output functions are provided
for additional flexibility in designing complex clock systems.
When combined with the internal PLL, these divide functions
allow distribution of a low-frequency clock that can be multi-
plied by two or four at the clock destination. This facility
minimizes clock distribution difficulty while allowing maximum
system clock speed and flexibility.
Pin Configuration
3F1
4F0
4F1
VCCQ
VCCN4
4Q1
4Q0
GND
GND
4 3 2 1 32 31 30
5 29
6 28
7 27
8 26
9 CY7C9915
10
25
24
11 23
12 22
13 21
14 15 16 17 18 19 20
2F0
GND
1F1
1F0
VCCN1
1Q0
1Q1
GND
GND
Cypress Semiconductor Corporation • 3901 North First Street • San Jose, CA 95134 • 408-943-2600
Document #: 38-07687 Rev. *A
Revised April 29, 2005

                    
                    






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