PHB11N06LT. 11N06LT Datasheet

11N06LT PHB11N06LT. Datasheet pdf. Equivalent

Part 11N06LT
Description PHB11N06LT
Feature Philips Semiconductors Product specification TrenchMOS™ transistor Logic level FET FEATURES • ’Tre.
Manufacture NXP Semiconductors
Datasheet
Download 11N06LT Datasheet

Philips Semiconductors Product specification TrenchMOS™ tr 11N06LT Datasheet
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11N06LT
Philips Semiconductors
TrenchMOStransistor
Logic level FET
Product specification
PHB11N06LT, PHD11N06LT
FEATURES
’Trench’ technology
• Very low on-state resistance
• Fast switching
www.DataSheetS4Uta.cbolme off-state characteristics
• High thermal cycling performance
• Low thermal resistance
SYMBOL
g
d
s
QUICK REFERENCE DATA
VDSS = 55 V
ID = 11 A
RDS(ON) 150 m(VGS = 5 V)
RDS(ON) 130 m(VGS = 10 V)
GENERAL DESCRIPTION
N-channel enhancement mode, logic level, field-effect power transistor in a plastic envelope using ’trench’ technology.
The device has very low on-state resistance. It is intended for use in dc to dc converters and general purpose switching
applications.
The PHB11N06LT is supplied in the SOT404 surface mounting package.
The PHD11N06LT is supplied in the SOT428 surface mounting package.
PINNING
PIN DESCRIPTION
1 gate
SOT428
tab
SOT404
tab
2 drain 1
3 source
tab drain
2
13
2
13
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER
CONDITIONS
VDSS
VDGR
VGS
ID
IDM
PD
Tj, Tstg
Drain-source voltage
Drain-gate voltage
Gate-source voltage
Continuous drain current
Pulsed drain current
Total power dissipation
Operating junction and
storage temperature
Tj = 25 ˚C to 175˚C
Tj = 25 ˚C to 175˚C; RGS = 20 k
Tmb = 25 ˚C
Tmb = 100 ˚C
Tmb = 25 ˚C
Tmb = 25 ˚C
MIN.
-
-
-
-
-
-
-
- 55
MAX.
55
55
± 13
11
7.6
44
36
175
UNIT
V
V
V
A
A
A
W
˚C
1 It is not possible to make contact to pin 2 of the SOT404 or SOT428 package
September 1998
1
Rev 1.000



11N06LT
Philips Semiconductors
TrenchMOStransistor
Logic level FET
Product specification
PHB11N06LT, PHD11N06LT
ESD LIMITING VALUE
SYMBOL PARAMETER
VC
www.DataSheet4U.com
Electrostatic discharge
capacitor voltage, all pins
CONDITIONS
Human body model (100 pF, 1.5 k)
THERMAL RESISTANCES
SYMBOL PARAMETER
Rth j-mb
Rth j-a
Thermal resistance junction
to mounting base
Thermal resistance junction
to ambient
CONDITIONS
SOT78 package, in free air
SOT428 and SOT404 package, pcb
mounted, minimum footprint
MIN.
-
MAX.
2
UNIT
kV
TYP.
-
60
50
MAX.
4.17
-
-
UNIT
K/W
K/W
K/W
ELECTRICAL CHARACTERISTICS
Tj= 25˚C unless otherwise specified
SYMBOL PARAMETER
CONDITIONS
V(BR)DSS
V(BR)GSS
VGS(TO)
RDS(ON)
gfs
IGSS
IDSS
Qg(tot)
Qgs
Qgd
td on
tr
td off
tf
Ld
Ls
Drain-source breakdown
voltage
Gate-source breakdown
voltage
Gate threshold voltage
Drain-source on-state
resistance
Forward transconductance
Gate source leakage current
Zero gate voltage drain
current
Total gate charge
Gate-source charge
Gate-drain (Miller) charge
VGS = 0 V; ID = 0.25 mA;
IG = ±1 mA;
Tj = -55˚C
VDS = VGS; ID = 1 mA
VGS = 10 V; ID = 5.5 A
VGS = 5 V; ID = 5.5 A
VDS = 25 V; ID = 5.5 A
VGS = ±5 V; VDS = 0 V
VDS = 55 V; VGS = 0 V;
Tj = 175˚C
Tj = -55˚C
Tj = 175˚C
Tj = 175˚C
Tj = 175˚C
ID = 11 A; VDD = 44 V; VGS = 5 V
Turn-on delay time
Turn-on rise time
Turn-off delay time
Turn-off fall time
VDD = 30 V; ID = 5 A;
VGS = 5 V; RG = 10
Resistive load
Internal drain inductance
Internal source inductance
Measured from tab to centre of die
Measured from source lead to source
bond pad
Ciss Input capacitance
Coss Output capacitance
Crss Feedback capacitance
VGS = 0 V; VDS = 25 V; f = 1 MHz
MIN. TYP. MAX. UNIT
55 -
50 -
10 -
-V
-V
-V
1.0 1.5 2.0 V
0.5 -
-V
- - 2.3 V
- 100 130 m
- 120 150 m
- 250 315 m
4 10 - S
- 0.02 1 µA
- - 20 µA
- 0.05 10 µA
- - 500 µA
- 6.1 - nC
- 1.3 - nC
- 3.2 - nC
- 6 16 ns
- 23 35 ns
- 18 30 ns
- 18 30 ns
- 3.5 - nH
- 7.5 - nH
- 250 330 pF
- 34 50 pF
- 35 50 pF
September 1998
2
Rev 1.000





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