IDT74LVC138A

IDT74LVC138A 3.3V CMOS 3-LINE TO 8-LINE DECODER/DEMULTIPLEXER INDUSTRIAL TEMPERATURE RANGE 3.3V CMOS 3-LINE TO 8-LINE DECODER/DEMULTIPLEXER WITH 5 VOLT TOLERANT I/O 0.5 MICRON CMOS Technology ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0) VCC = 3.3V ± 0.3V, Normal Range VCC = 2.7V to 3.6V, Extended Range CMOS power levels (0.4µ W typ. static) www.DataSheet4U.com Rail-to-Rail output swing for increased noise margin All inputs, outputs, and I/Os are 5V tolerant Supports hot insertion Available in QSOP, SOIC, SSOP, and TSSOP packages IDT74LVC138A FEATURES: DESCRIPTION: DRIVE FEATURES: APPLICATIONS: High Output Drivers: ±24mA Reduced system switching noise 5V and 3.3V mixed voltage systems Data communication and telecommunication systems The LVC138A 3-line to 8-line decoder/demultiplexer is built using advanced dual metal CMOS technology. This device is designed for highperformance memory-decoding or data-routing applications requiring very short propagation delay times. In high performance memory systems, this decoder minimizes the effects of system decoding. When employed with high-speed memories utilizing a fast enable circuit, the delay times of these decoders and the enable time of the memory are usually less than the typical access time of the memory. This means that the effective system delay introduced by the decoder is negligible. The conditions at the binary-select inputs and the three enable in...