3.3V CMOS 16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP
IDT74LVCH16374A 3.3V CMOS 16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP
INDUSTRIAL TEMPERATURE RANGE
3.3V CMOS 16-BIT IDT74LV...
Description
IDT74LVCH16374A 3.3V CMOS 16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP
INDUSTRIAL TEMPERATURE RANGE
3.3V CMOS 16-BIT IDT74LVCH16374A EDGE-TRIGGERED D-TYPE FLIPFLOP WITH 3-STATE OUTPUTS, 5V TOLERANT I/O AND BUS-HOLD
Typical tSK(o) (Output Skew) < 250ps ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0) VCC = 3.3V ± 0.3V, Normal Range VCC = 2.7V to 3.6V, Extended Range CMOS power levels (0.4µ W typ. static) www.DataSheet4U.com All inputs, outputs, and I/O are 5V tolerant Supports hot insertion Available in SSOP, TSSOP, and TVSOP packages
FEATURES:
DESCRIPTION
DRIVE FEATURES: APPLICATIONS:
High Output Drivers: ±24mA Reduced system switching noise
5V and 3.3V mixed voltage systems Data communication and telecommunication systems
The LVCH16374A 16-bit edge-triggered D-type register is built using advanced dual metal CMOS technology. This high-speed, low-power register is ideal for use as a buffer register for data synchronization and storage. The Output Enable (OE) and clock (CLK) controls are organized to operate each device as two 8-bit registers or one 16-bit register with common clock. Flow-through organization of signal pins simplifies layout. All inputs are designed with hysteresis for improved noise margin. All pins of the LVCH16374A can be driven from either 3.3V or 5V devices. This feature allows the use of this device as a translator in a mixed 3.3V/5V supply system. The LVCH16374A has been designed with a ±2...
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