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LCD CONTROLLER/DRIVER. UPD16498 Datasheet

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LCD CONTROLLER/DRIVER. UPD16498 Datasheet






UPD16498 CONTROLLER/DRIVER. Datasheet pdf. Equivalent




UPD16498 CONTROLLER/DRIVER. Datasheet pdf. Equivalent





Part

UPD16498

Description

1/128 DUTY LCD CONTROLLER/DRIVER



Feature


DATA SHEET MOS INTEGRATED CIRCUIT µPD 16498 1/128 DUTY LCD CONTROLLER/DRIVER WITH FOUR-LEVEL GRAY SCALE, ON-CHIP RA M DESCRIPTION www.DataSheet4U.com The µPD16498 is a controller/driver which includes display RAM for full-dot LCDs that can provide a four-level gray sca le display. This IC is able to drive f ull-dot LCDs that contain up to 128 x 1 28 dots. FEATURES •.
Manufacture

NEC

Datasheet
Download UPD16498 Datasheet


NEC UPD16498

UPD16498; LCD controller/driver with on-chip disp lay RAM • Full dot outputs: 128 segme nt outputs and 128 common outputs • S tatic icon outputs: 20 segment outputs and 2 common outputs (same signal is ou tput) • Can operate using single powe r supply (logic system) in range from 1 .7 to 3.6 V. • Selection of four leve ls of gray scales from among 33 possibl e levels (four-frame rate .


NEC UPD16498

control + 8 pulse width modulation) • Serial data input and 8-bit parallel da ta input (i80 series interface and M68 series interface) • Dot display RAM: 128 x 128 x 2 bits • On-chip booster: Switchable from x2 to x9 modes • Sel ectable bias levels: 1/12 to 1/7 bias ( normal display), 1/6 or 1/5 bias (parti al display) • Duty settings: 1/128 to 1/1 duty • On-chip voltage .


NEC UPD16498

divider resistor • On-chip oscillator ORDERING INFORMATION Part Number Packa ge Chip Wafer µPD16498P µPD16498W R emark Purchasing the chip/wafer entails the exchange of documents such as a se parate memorandum or product quality, s o please contact one of our sales repre sentative. The information in this doc ument is subject to change without noti ce. Before using this .

Part

UPD16498

Description

1/128 DUTY LCD CONTROLLER/DRIVER



Feature


DATA SHEET MOS INTEGRATED CIRCUIT µPD 16498 1/128 DUTY LCD CONTROLLER/DRIVER WITH FOUR-LEVEL GRAY SCALE, ON-CHIP RA M DESCRIPTION www.DataSheet4U.com The µPD16498 is a controller/driver which includes display RAM for full-dot LCDs that can provide a four-level gray sca le display. This IC is able to drive f ull-dot LCDs that contain up to 128 x 1 28 dots. FEATURES •.
Manufacture

NEC

Datasheet
Download UPD16498 Datasheet




 UPD16498
DATA SHEET
MOS INTEGRATED CIRCUIT
µPD16498
1/128 DUTY LCD CONTROLLER/DRIVER WITH FOUR-LEVEL GRAY SCALE, ON-CHIP RAM
DESCRIPTION
The µPD16498 is a controller/driver which includes display RAM for full-dot LCDs that can provide a four-level gray scale
www.DataSheet4U.com
display. This IC is able to drive full-dot LCDs that contain up to 128 x 128 dots.
FEATURES
LCD controller/driver with on-chip display RAM
Full dot outputs: 128 segment outputs and 128 common outputs
Static icon outputs: 20 segment outputs and 2 common outputs (same signal is output)
Can operate using single power supply (logic system) in range from 1.7 to 3.6 V.
Selection of four levels of gray scales from among 33 possible levels (four-frame rate control + 8 pulse width
modulation)
Serial data input and 8-bit parallel data input (i80 series interface and M68 series interface)
Dot display RAM: 128 x 128 x 2 bits
On-chip booster: Switchable from x2 to x9 modes
Selectable bias levels: 1/12 to 1/7 bias (normal display), 1/6 or 1/5 bias (partial display)
Duty settings: 1/128 to 1/1 duty
On-chip voltage divider resistor
On-chip oscillator
ORDERING INFORMATION
Part Number
µPD16498P
µPD16498W
Package
Chip
Wafer
Remark Purchasing the chip/wafer entails the exchange of documents such as a separate memorandum or product
quality, so please contact one of our sales representative.
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No. S15730EJ2V0DS00 (2nd Edition)
Date Published June 2002 NS CP(K)
2001




 UPD16498
TABLE OF CONTENTS
µPD16498
1. BLOCK1. BLOCK DIAGRAM ................................................................................................................... 5
2. PIN CONFIGURATION (PAD LAYOUT) ................................................................................................... 6
3. PIN FUNCTIONS ...................................................................................................................................... 10
www.DataSheet4U.c3o.m1 Power Supply System Pins ............................................................................................................................ 10
3.2 Logic System Pins .......................................................................................................................................... 11
3.3 Driver-Related Pins ......................................................................................................................................... 13
3.4 Test Pins ......................................................................................................................................................... 14
4. PIN I/O CIRCUITS AND RECOMMENDED CONNECTION OF UNUSED PINS .................................... 15
5. DESCRIPTION OF FUNCTIONS ............................................................................................................. 16
5.1 CPU Interface ....................................................................................................................................... 16
5.1.1 Selection of interface type ............................................................................................................ 16
5.1.2 Parallel interface ........................................................................................................................... 16
5.1.3 Serial interface ............................................................................................................................ 18
5.1.4 Chip select ................................................................................................................................... 18
5.1.5 Display data RAM and on-chip register access ................................................................................ 18
5.2 Display Data RAM ................................................................................................................................ 21
5.2.1 Display data RAM .................................................................................................................................... 21
5.2.2 X address circuit ..................................................................................................................................... 21
5.2.3 Column address circuit ............................................................................................................................ 23
5.2.4 Y address circuit ...................................................................................................................................... 23
5.2.5 Common scan circuit ............................................................................................................................... 23
5.2.6 Display start line set ................................................................................................................................. 23
5.2.7 Display data latch circuit .......................................................................................................................... 23
5.3 Blink/Reverse Display Circuit ......................................................................................................................... 24
5.4 Oscillator .......................................................................................................................................................... 26
5.5 Display Timing Generator ............................................................................................................................... 30
5.6 Power Supply Circuit ....................................................................................................................................... 31
5.6.1 Booster .................................................................................................................................................... 31
5.6.2 Voltage regulator ..................................................................................................................................... 33
5.6.3 Use of op amp for level power supply control .......................................................................................... 36
5.6.4 Application examples of power supply circuits ......................................................................................... 37
5.7 LCD Display Drivers ........................................................................................................................................ 40
5.7.1 Full-dot pulse width modulation ............................................................................................................... 40
5.7.2 Full-dot frame rate control ........................................................................................................................ 45
5.7.3 Line shift driver ........................................................................................................................................ 46
5.7.4 Display size settings ................................................................................................................................ 48
5.7.5 Setting of LCD AC driver's inversion cycle and AC driver's inversion position ......................................... 48
2 Data Sheet S15730EJ2V0DS




 UPD16498
µPD16498
5.8 Display Modes .................................................................................................................................................. 50
5.8.1 Partial display mode ................................................................................................................................ 50
5.8.2 Monochrome (black/white) display ........................................................................................................... 52
5.8.3 Icon display .............................................................................................................................................. 54
5.9 Reset ................................................................................................................................................................. 56
6. COMMAND REGISTERS .......................................................................................................................... 57
6.1 Control Register 1 (R0) .................................................................................................................................... 58
6.2 Control Register 2 (R1) .................................................................................................................................... 59
www.DataSheet4U.c6o.m3 Reset Command (R2) ....................................................................................................................................... 60
6.4 X Address Register (R3) .................................................................................................................................. 60
6.5 Y Address Register (R4) .................................................................................................................................. 60
6.6 Duty Setting Register (R5) .............................................................................................................................. 61
6.7 AC Driver Inversion Cycle Register (R6) ........................................................................................................ 61
6.8 AC Driver Inversion Position Shift Register (R7) .......................................................................................... 62
6.9 Partial AC Driver Inversion Cycle Register (R8) ............................................................................................ 62
6.10 Partial AC Driver Inversion Position Shift Register (R9) ............................................................................ 63
6.11 Partial Display Mode Setting Register (R10) ................................................................................................ 63
6.12 Display Memory Access Register (R11)........................................................................................................ 64
6.13 Display Start Line Setting Register (R12) ..................................................................................................... 64
6.14 Blink X Address Register (R13) .................................................................................................................... 64
6.15 Blink Start Line Address Register (R14) ...................................................................................................... 65
6.16 Blink End Line Address Register (R15) ....................................................................................................... 65
6.17 Blink Data Memory Access Register (R16) .................................................................................................. 65
6.18 Inverted X Address Register (R17) ............................................................................................................... 66
6.19 Inversion Start Line Address Register (R18) ................................................................................................ 66
6.20 Inversion End Line Address Register (R19) ................................................................................................ 66
6.21 Inverted Data Memory (R20) .......................................................................................................................... 67
6.22 Partial Start Line Address Register (R21) .................................................................................................... 67
6.23 Gray Scale Data Registers 1 to 4 (R23 to R26) ............................................................................................ 68
6.24 Partial Gray Scale Data Registers 1 to 4 (R27 to R30) ................................................................................ 68
6.25 Power System Control Register 1 (R32) ...................................................................................................... 69
6.26 Power System Control Register 2 (R33) ...................................................................................................... 70
6.27 Power System Control Register 3 (R34) ...................................................................................................... 71
6.28 Electronic Volume Register (R35) ................................................................................................................ 72
6.29 Partial Electronic Volume Register (R36) .................................................................................................... 72
6.30 Boost Adjustment Register (R37) ................................................................................................................. 72
6.31 Static Icon Address Register (R40) ............................................................................................................. 73
6.32 Static Icon Data Register (R41) ..................................................................................................................... 73
6.33 Static Icon Contrast Register (R42) .............................................................................................................. 73
6.34 RAM Test Mode Setting Register (R44) ........................................................................................................ 74
6.35 Signature Read Register (R45) ..................................................................................................................... 74
7. LIST OF µPD16498 REGISTERS ............................................................................................................ 75
Data Sheet S15730EJ2V0DS
3



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