Dynamically Reconfigurable Processor
DAPDNA-2
Dynamically Reconfigurable Processor
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■ DAPDNA Architecture
The DAPDNA Dynamically Reconfi...
Description
DAPDNA-2
Dynamically Reconfigurable Processor
www.DataSheet4U.com
■ DAPDNA Architecture
The DAPDNA Dynamically Reconfigurable Processor is configurable during run-time to instantly (in one clock) provide the optimal hardware circuitry for application in demand. The DAPDNA has a dual-core architecture, comprised of a RISC core (the DAP) and a dynamically reconfigurable matrix (the DNA). This platform provides the processing performance of hardware with the flexibility of software. DAP (Digital Application Processor) High-performance RISC processor Controls the dynamic reconfiguration of the DNA DNA (Distributed Network Architecture) Dynamically reconfigurable Two-dimensional array of 376 Processing Elements (PEs) Allows arbitrary configuration of the degree of parallelism and pipeline depth
DAPDNA Processor
DNA Direct I/O DAP Debug Interface RISC Core Instruction Cache Data Cache High-speed Bus Switch Peripherals DDR-SDRAM DMA Interface Controller DNA DNA Configuration memory
■ Dynamic Reconfiguration
The DAPDNA-2's dynamic reconfiguration enables three beneficial usage models.
➀ Multi-function ➁ Time-slice ➂ Algorithm evolution
Dynamic reconfiguration
Dynamic reconfiguration
Dynamic reconfiguration
Fig.2 Dynamic Reconfiguration usage ➀ Multi-function
Function can be selected and executed according to changes in operating conditions (e.g.different encoding methods in incoming data)
➁ Time-slice
Algorithms can be partitioned in time As soon as one process...
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