ANALOG IP BLOCK PECL_RX - CMOS PECL Receiver
DATA SHEET
PROCESS
C35B3 (0.35um)
DESCRIPTION
The PECL_RX is a 3.3 V PECL differential line receiver featuring an operating frequency up to 311 MHz (622 Mb/s) and accepting standard F100K levels (referred to the positive supply). The PECL_RX accepts (750 mV) differential input signals and translates them to CMO...