FPD750DFN
LOW NOISE HIGH LINEARITY PACKAGED PHEMT
FEATURES (1850MHZ):
• • • • • • 24 dBm Output Power (P1dB) 20 dB Small...
FPD750DFN
LOW NOISE HIGH LINEARITY PACKAGED PHEMT
FEATURES (1850MHZ):
24 dBm Output Power (P1dB) 20 dB Small-Signal Gain (SSG) 0.3 dB Noise Figure 39 dBm Output IP3 at 50% Bias 45% Power-Added Efficiency RoHS compliant
Datasheet v3.0
PACKAGE:
RoHS
9
TYPICAL APPLICATIONS:
Drivers or output stages in PCS/Cellular base station transmitter amplifiers High intercept-point LNAs WLL and WLAN systems, and other types of wireless infrastructure systems.
GENERAL www.DataSheet4U.com
DESCRIPTION:
The FPD750DFN is a packaged depletion mode AlGaAs/InGaAs pseudomorphic High Electron Mobility
Transistor (pHEMT). It utilizes a 0.25 µm x 750 µm
Schottky barrier Gate, defined by high-resolution stepperbased photolithography. The recessed and offset Gate structure minimizes parasitics to optimize performance, with an epitaxial structure designed for improved linearity over a range of bias conditions and input power levels.
ELECTRICAL SPECIFICATIONS:
PARAMETER
Power at 1dB Gain Compression Small-Signal Gain
SYMBOL
P1dB SSG
CONDITIONS
VDS = 5 V; IDS = 50% IDSS VDS = 5 V; IDS = 50% IDSS
MIN
22.5 19
TYP
24 20
MAX
UNITS
dBm dB
Power-Added Efficiency
PAE
VDS = 5 V; IDS = 50% IDSS; POUT = P1dB
45
%
Noise Figure
NF
VDS = 5 V; IDS = 50% IDSS VDS = 5 V; IDS = 25% IDSS
0.7 0.3
1.1 0.9
dB
Output Third-Order Intercept Point (from 15 to 5 dB below P1dB)
IP3
VDS = 5V; IDS = 50% IDSS Matched for optimal power Matched for best IP3 37 39 180 230 375 200 1 0.7 12 12 1.0...