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PLL130-09

PhaseLink Corporation

High Speed Translator Buffer to LVDS


Description
PLL130-09 High Speed Translator Buffer to LVDS FEATURES Differential LVDS output Single AC coupled input (min. 100mV swing). Input range from DC to 1.0 GHz. 2.5V to 3.3V operation. Available in 8-Pin SOIC or 3x3mm QFN. PIN CONFIGURATION (TOP VIEW) GND REF_IN 1 2 3 4 VDD 8 7 6 5 GND VDD GND LVDS_BAR VDD PLL130-09 www.DataSheet4U.com DESCRIPTI...



PhaseLink Corporation

PLL130-09

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