Document
AME, Inc.
AT209S
n General Description
The AT209S is an integrated device that contains a PCI Arbiter and a Clock Buffer. PCI Arbiter extends system PCI devices without piecing other circuit to simplify design complexity and increase systems stability. PCI Arbiter www.DataSheet4U.com also provides STOP# input pin with that extended PCI devices instruct the master to prematurely end the transaction on the current data phase same as one in PCI specification. Clock Buffer is a high performance and low jitter zero delay buffer that provides synchronization between the input and output. The synchronization is established via CLKO feed back to the input of a build-in PLL. PCICLKI is the clock input of the Clock Buffer. In the absence of PCICLKI input, will be in the power down mode. In this mode, the PLL is turned off and the output buffers are pulled low. Power down mode provides the lowest power consumption for a standby condition.
PCI Arbiter and Clock Buffer
n Features
l PCI Arbiter Extend PCI Devices from One to Three l PCI Clock Frequency Support PCI Clock range from 25MHz to 66MHz l Zero delay buffer Generate four zero delay clock sources Support frequency range from 25MHz to 66MHz l All AME's Lead Free Products Meet RoHS Standards
Rev.A.01
1
AME, Inc.
AT209S
n Pin Configuration
PCI Arbiter and Clock Buffer
NC P C IS T O P #
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1 2 3 4 5 6 7 8 9 10 11 12 13 14
28 27 26 25
AVCC P C IC L K I P C IR S T # AVSS VSS P C IC L K O U T P C IC L K 1 VCC P C IC L K 2 P C IC L K 3 P C IC L K 4 VSS NC NC
S YS R E Q # S YS G N T # P C IR E Q 1 # VSS P C IG N T 1 # P C IR E Q 2 # VCC P C IG N T 2 # P C IR E Q 3 # P C IG N T 3 # NC NC
A T 2 0 9 S
24 23 22 21 20 19 18 17 16 15
¡° Ordering Information AT209S- Commercial Standard AT209SG- Green Device with Commercial Standard
2
Rev.A.01
AME, Inc.
AT209S
n Pin Description
I/O Type
IN OUT
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PCI Arbiter and Clock Buffer
Function
Input Pin Output Pin Power Pin
PWR
Pin No.
26 2 3 4 5 7 8 10 11 12
Pin Name
PCIRST# PCISTOP# SYSREQ# SYSGNT# PCIREQ1# PCIGNT1# PCIREQ2# PCIGNT2# PCIREQ3# PCIGNT3#
I/O Type
IN IN OUT IN IN OUT IN OUT IN OUT PCI bus reset#
Function
PCI bus stop# (Internal 47K pull-up resistor) Request signal to chipset Grant signal from chipset (Internal 47K pull-up resistor) Request signal from PCI bus (Internal 47K pull-up resistor) Grant signal to PCI bus Request signal from PCI bus (Internal 47K pull-up resistor) Grant signal to PCI bus Request signal from PCI bus (Internal 47K pull-up resistor) Grant signal to PCI bus
Table 1. PCI Arbiter FSM Group Signal, Power; Vcc3V (3.3V)
Rev.A.01
3
AME, Inc.
AT209S
n Pin Description
Pin No.
18 19
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PCI Arbiter and Clock Buffer
Pin Name
PCICLK4 PCICLK3 PCICLK2 PCICLK1 PCICLKOUT PCICLKI
I/O Type
OUT OUT OUT OUT OUT IN PCICLK output PCICLK output PCICLK output PCICLK output
Function
20 22 23 27
PLL feedback and Internal feedback on this pin PCLCLK input reference frequency
Table 2. .