(AS7C251MNTF32A / AS7C251MNTF36A) 2.5V 1M x 32/36 Flowthrough SRAM
December 2004
®
AS7C251MNTF32A AS7C251MNTF36A
2.5V 1M × 32/36 Flowthrough SRAM with NTDTM
Features
• • • • • • • • Org...
Description
December 2004
®
AS7C251MNTF32A AS7C251MNTF36A
2.5V 1M × 32/36 Flowthrough SRAM with NTDTM
Features
Organization: 1,048,576 words × 32 or 36 bits NTD™architecture for efficient bus operation Fast clock to data access: 7.5/8.5/10 ns Fast OE access time: 3.5/4.0 ns Fully synchronous operation Flow-through mode Asynchronous output enable control Available in 100-pin TQFP package
Byte write enables Clock enable for operation hold Multiple chip enables for easy expansion 2.5V core power supply Self-timed write cycles Interleaved or linear burst modes Snooze mode for standby operation
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Logic block diagram
A[19:0] 20 D
Address register Burst logic
Q
20
CLK CE0 CE1 CE2 R/W BWa BWb BWc BWd ADV / LD LBO ZZ
D
Q 20
Write delay addr. registers
CLK
Control logic
CLK
Write Buffer
CLK
1M x 32/36 SRAM Array
DQ[a,b,c,d]
32/36
D
Data Q Input Register
CLK
32/36 32/36 32/36
32/36 CLK CEN OE
Output Buffer
32/36 OE
DQ[a,b,c,d]
Selection guide
-75 Minimum cycle time Maximum clock access time Maximum operating current Maximum standby current Maximum CMOS standby current (DC) 8.5 7.5 325 140 90 -85 10 8.5 300 130 90 -10 12 10 275 130 90 Units ns ns mA mA mA
12/23/04, v 1.1
Alliance Semiconductor
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AS7C251MNTF32A/36A
®
2.5V 32 Mb Synchronous SRAM products list1,2
Org 2MX18 1MX32 1MX36 2MX18 1MX32 1MX36 2MX18 1MX32 www.DataSheet4U.com 1MX36 2MX18 1MX32 1MX36 ...
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