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BUK7214-75B Dataheets PDF



Part Number BUK7214-75B
Manufacturers NXP
Logo NXP
Description Standard Level Fet
Datasheet BUK7214-75B DatasheetBUK7214-75B Datasheet (PDF)

BUK7214-75B TrenchMOS™ standard level FET M3D300 Rev. 01 — 26 January 2004 Product data 1. Product profile 1.1 Description www.DataSheet4U.com N-channel enhancement mode field-effect power transistor in a plastic package using Philips High-Performance Automotive (HPA) TrenchMOS™ technology. 1.2 Features s Very low on-state resistance s 185 °C rated s Q101 compliant s Standard level compatible. 1.3 Applications s Automotive systems s Motors, lamps and solenoids s 12 V, 24 V, and 42 V loads s .

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BUK7214-75B TrenchMOS™ standard level FET M3D300 Rev. 01 — 26 January 2004 Product data 1. Product profile 1.1 Description www.DataSheet4U.com N-channel enhancement mode field-effect power transistor in a plastic package using Philips High-Performance Automotive (HPA) TrenchMOS™ technology. 1.2 Features s Very low on-state resistance s 185 °C rated s Q101 compliant s Standard level compatible. 1.3 Applications s Automotive systems s Motors, lamps and solenoids s 12 V, 24 V, and 42 V loads s General purpose power switching. 1.4 Quick reference data s EDS(AL)S ≤ 133 mJ s ID ≤ 70 A s RDSon = 12.6 mΩ (typ) s Ptot ≤ 167 W. 2. Pinning information Table 1: Pin 1 2 3 mb Pinning - SOT428 (D-PAK), simplified outline and symbol Simplified outline [1] Description gate (g) drain (d) source (s) mounting base; connected to drain (d) Symbol d mb g s MBB076 2 1 Top view 3 MBK091 SOT428 (D-PAK) [1] It is not possible to make connection to pin 2 of the SOT428 package. Philips Semiconductors BUK7214-75B TrenchMOS™ standard level FET 3. Ordering information Table 2: Ordering information Package Name BUK7214-75B D-PAK Description Plastic single-ended surface mounted package (Philips version of D-PAK); 3 leads (one lead cropped). Version SOT428 Type number www.DataSheet4U.com 4. Limiting values Table 3: Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol VDS VDGR VGS ID Parameter drain-source voltage (DC) drain-gate voltage (DC) gate-source voltage (DC) drain current (DC) Tmb = 25 °C; VGS = 10 V; Figure 2 and 3 Tmb = 100 °C; VGS = 10 V; Figure 2 IDM Ptot Tstg Tj IDR IDRM EDS(AL)S peak drain current total power dissipation storage temperature junction temperature reverse drain current (DC) peak reverse drain current non-repetitive drain-source avalanche energy Tmb = 25 °C Tmb = 25 °C; pulsed; tp ≤ 10 µs unclamped inductive load; ID = 70 A; VDS ≤ 75 V; VGS = 10 V; RGS = 50 Ω; starting Tj = 25 °C Tmb = 25 °C; pulsed; tp ≤ 10 µs; Figure 3 Tmb = 25 °C; Figure 1 RGS = 20 kΩ Conditions Min −55 −55 Max 75 75 ±20 70 50 283 167 +185 +185 70 283 133 Unit V V V A A A W °C °C A A mJ Source-drain diode Avalanche ruggedness 9397 750 12231 © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Product data Rev. 01 — 26 January 2004 2 of 12 Philips Semiconductors BUK7214-75B TrenchMOS™ standard level FET 120 Pder (%) 80 03no96 75 ID (A) 50 03nl22 www.DataSheet4U.com 40 25 0 0 50 100 150 200 Tmb (°C) 0 0 50 100 150 200 Tmb (°C) P tot P der = ---------------------- × 100 % P ° tot ( 25 C ) VGS ≥ 10 V Fig 1. Normalized total power dissipation as a function of mounting base temperature. Fig 2. Continuous drain current as a function of mounting base temperature. 103 Limit RDSon = VDS / ID 03nl20 ID (A) 102 tp = 10 µ s 100 µ s DC 10 1 ms 10 ms 100 ms 1 1 10 102 VDS (V) 103 Tmb = 25 °C; IDM single pulse. Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source v.


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