Document
STB15NM60N - STF/I15NM60N STP15NM60N - STW15NM60N
N-channel 600V - 0.270Ω - 14A - D2/I2PAK - TO-220/FP - TO-247 Second generation MDmesh™ Power MOSFET
Features
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Type
VDSS (@Tjmax) 650V 650V 650V 650V 650V
RDS(on) < 0.299Ω < 0.299Ω < 0.299Ω < 0.299Ω < 0.299Ω
ID
1
3
3 12
STB15NM60N STI15NM60N STF15NM60N STP15NM60N STW15NM60N
14A 14A 14A (1) 14A 14A
D²PAK
I²PAK
TO-247
3 1 2
3 1 2
1. Limited only by maximum temperature allowed ■ ■ ■
100% avalanche tested Low input capacitance and gate charge Low gate input resistance
TO-220
TO-220FP
Internal schematic diagram Description
This series of devices implements the second generation of MDmesh™ Technology. This revolutionary Power MOSFET associates a new vertical structure to the Company’s strip layout to yield one of the world’s lowest on-resistance and gate charge. It is therefore suitable for the most demanding high efficiency converters
Application
■
Switching applications
Order codes
Part number STB15NM60N STI15NM60N STF15NM60N STP15NM60N STW15NM60N Marking B15NM60N I15NM60N F15NM60N P15NM60N W15NM60N Package D²PAK I²PAK TO-220FP TO-220 TO-247 Packaging Tape & reel Tube Tube Tube Tube
May 2007
Rev 1
1/18
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Contents
STB15NM60N - STF/I15NM60N - STP15NM60N - STW15NM60N
Contents
1 2 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1 Electrical characteristics (curves) ............................ 6
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3
Test circuit
................................................ 9
4 5 6
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Packaging mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
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STB15NM60N - STF/I15NM60N - STP15NM60N - STW15NM60N
Electrical ratings
1
Electrical ratings
Table 1.
Symbol
Absolute maximum ratings
Value Parameter D²PAK/I²PAK TO-220FP TO-220/TO-247 600 ± 25 14 9 56 125 15 -2500 14 (1) 9(1) 56 (1) 30 Unit
VDS
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Drain-source voltage (VGS=0) Gate-source voltage Drain current (continuous) at TC = 25°C Drain current (continuous) at TC = 100°C Drain current (pulsed) Total dissipation at TC = 25°C Peak diode recovery voltage slope Insulation withstand voltage (RMS) from all three leads to external heat sink (t=1s;TC=25°C) Operating junction temperature Storage temperature
V V A A A W V/ns V
VGS ID ID IDM (2) PTOT dv/dt (3) VISO Tj Tstg
-55 to 150
°C
1. Limited only by maximum temperature allowed 2. Pulse width limited by safe operating area 3. ISD ≤14A, di/dt ≤400A/µs, VDD = 80% V(BR)DSS
Table 2.
Symbol Rthj-case Rthj-amb Tl
Thermal data
Parameter Thermal resistance junction-case max Thermal resistance junction-amb max Maximum lead temperature for soldering purposes D²PAK/I²PAK TO-220FP TO-220/TO-247 1 62.5 300 4.2 Unit °C/W °C/W °C
Table 3.
Symbol IAS EAS
Avalanche characteristics
Parameter Avalanche current, repetitive or not-repetitive (pulse width limited by Tj max) Single pulse avalanche energy (starting Tj=25°C, ID=IAS, VDD= 50V) Max value 6 300 Unit A mJ
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Electrical characteristics
STB15NM60N - STF/I15NM60N - STP15NM60N - STW15NM60N
2
Electrical characteristics
(TCASE=25°C unless otherwise specified) Table 4.
Symbol V(BR)DSS
On/off states
Parameter Drain-source breakdown voltage Drain-source voltage slope Zero gate voltage drain current (VGS = 0) Gate body leakage current (VDS = 0) Gate threshold voltage Static drain-source on resistance Test conditions ID = 1mA, VGS= 0 VDD = 480V,ID = 14A, VGS = 10V VDS = Max rating, VDS = Max rating,@125°C VGS = ±20V VDS= VGS, ID = 250µA VGS= 10V, ID= 7A 2 3 0.270 Min. 600 30 1 100 100 4 0.299 Typ. Max. Unit V V/ns µA µA nA V Ω
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dv/dt(1)
IDSS IGSS VGS(th) RDS(on)
1. Value measured at turn off under inductive load
Table 5.
Symbol gfs(1) Ciss Coss Crss Coss eq.(2)
Dynamic
Parameter Forward transconductance Input capacitance Output capacitance Reverse transfer capacitance Equivalent output capacitance Gate input resistance Test conditions VDS =15V, ID= 7A VDS = 50V, f =1MHz, VGS = 0 Min. Typ. 10 1250 100 10 137 Max. Unit S pF pF pF pF
VGS = 0, VDS = 0V to 480V f=1MHz Gate DC Bias=0 Test signal level=20mV open drain VDD = 480V, ID = 14A VGS = 10V (see Figure 18)
Rg
6.0
Ω nC nC nC
Qg Qgs Qgd
1.
Total gate charge Gate-source charge Gate-drain charge
37 6 18
Pulsed: pulse duration = 300µs, duty cycle 1.5%
2. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS
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STB15NM60N - STF/I15NM60N - STP15NM60N - STW15NM60N
Electrical characteristics
Table 6.
Symbol td(on) tr td(off) tf
Switching times
Parameter Turn-on delay time Rise time T.