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PI74ALVC162835FD Dataheets PDF



Part Number PI74ALVC162835FD
Manufacturers Pericom Semiconductor Corporation
Logo Pericom Semiconductor Corporation
Description 16-Bit Universal Bus Driver
Datasheet PI74ALVC162835FD DatasheetPI74ALVC162835FD Datasheet (PDF)

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12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 PI74ALVC162835FD 18-Bit Universal Bus Driver with 3-State Outputs Product Features • PI74ALVC162835FD is designed for low voltage operation, VCC = 2.3V to 3.6V • Data inputs have clamp diodes to VCC • Outputs have equivalent 26Ω series resistors www.DataSheet4U.com • Supports PC133 Registered DIMM • Typical VOLP (Output Ground Bounce) < 0.8V at VCC = 3.3V, TA = 25°C • Typical VOHV (Output VOH Undershoot) < 2.0V at VCC = 3.3V, TA = 25°C • Industrial operation at –40°C to +85°C • Packages available: – 56-pin 240 mil wide plastic TSSOP (A) – 56-pin 173 mil wide plastic TVSOP (K6) – 56-pin 300 mil wide plastic SSOP (V) Product Description Pericom Semiconductor’s PI74ALVC series of logic circuits are produced using the Company’s advanced 0.5 micron CMOS technology, achieving industry leading speed. The 18-bit PI74ALVC162835FD universal bus driver is designed for 2.3V to 3.6V VCC operation. Data flow from A to Y is controlled by Output Enable (OE). The device operates in the transparent mode when LE is HIGH. The A data is latched if CLK is held at a high or low logic level. If LE is LOW, the A-bus is stored in the latch/flip-flop on the low-to-high transition of CLK. When OE is HIGH, the outputs are in the highimpedance state. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. Logic Block Diagram 27 OE CLK 30 LE 28 A1 54 1D C1 CLK 3 Y1 TO 17 OTHER CHANNELS 1 PS8474 04/25/00 PI74ALVC162835FD 18-Bit Universal Bus Driver with 3-State Outputs 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Product Pin Description Pin Name OE LE CLK A Y GND VCC Description Output Enable Input (Active LOW) Latch Enable Clock Input Data Input Data Output Ground Power Truth Table(1)† Inputs OE H L L L L LE X H H L L L L CLK X X X ↑ ↑ H L A X L H L H X X Outputs Y Z L H L H Yo(2) Yo(3) www.DataSheet4U.com Product Pin Configuration NC NC Y1 GND Y2 Y3 VCC Y4 Y5 Y6 GND Y7 Y8 Y9 Y10 Y11 Y12 GND Y13 Y14 Y15 VCC Y16 Y17 GND Y18 OE LE L L 56 55 54 53 52 51 50 49 GND NC A1 GND A2 A3 VCC A4 A5 A6 GND A7 A8 A9 A10 A11 A12 GND A13 A14 A15 VCC A16 A17 GND A18 CLK GND 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 56-Pin A,K,V 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 Notes: 1. H = High Signal Level L = Low Signal Level Z = High Impedance ↑ = Transition LOW-to-HIGH X = Irrelevant 2. Output level before the indicated steady-state input conditions were established, provided that CLK is high before LE goes low. 3. Output level before the indicated steady-state input conditions were established. 2 PS8474 04/25/00 PI74ALVC162835FD 18-Bit Universal Bus Driver with 3-State Outputs 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Maximum Ratings (Above which the useful life may be impaired. For user guidelines, not tested.) Storage Temperature ......................................................... –65°C to +150°C Ambient Temperature with Power Applied ....................... –40°C to +85°C Input Voltage Range, VIN ................................................. –0.5V to VCC +0.5V Output Voltage Range, VOUT .......................................... –0.5V to VCC +0.5V DC Input Voltage ................................................................ –0.5V to +5.0V DC Output Current ............................................................................ 100mA www.DataSheet4U.com Power Dissipation ................................................................................ 1.0W Note: Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. Recommended Operating Conditions(1) Parame te rs VCC VIH VIL VIN VOUT IOH De s cri.


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