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PI74ALVCH16374 Dataheets PDF



Part Number PI74ALVCH16374
Manufacturers Pericom Semiconductor Corporation
Logo Pericom Semiconductor Corporation
Description 16-Bit Edge Triggered D-Type Flip-Flop
Datasheet PI74ALVCH16374 DatasheetPI74ALVCH16374 Datasheet (PDF)

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12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 PI74ALVCH16374 16-Bit Edge Triggered D-Type Flip-Flop with 3-State Outputs Product Features PI74ALVCH16374 is designed for low voltage operation VCC = 2.3V to 3.6V Hysteresis on all inputs Typical VOLP (Output Ground Bounce) < 0.8V at V = 3.3V, TA = 25°C www.DataSheet4U.com CC • Typical VOHV (Output VOH Undershoot) < 2.0V at VCC = 3.3V, TA = 25°C • Bus Hold retains last active bus state during 3-STATE eliminating the need for external pullup resistors • Industrial operation at –40°C to +85°C • Packages available: – 48-pin 240 mil wide plastic TSSOP (A) – 48-pin 300 mil wide plastic SSOP (V) • • • • Product Description Pericom Semiconductor’s PI74ALVCH series of logic circuits are produced in the Company’s advanced 0.5 micron CMOS technology, achieving industry leading speed. This 16-bit edge-triggered D-type flip-flop is designed for 2.3V to 3.6V VCC operation. The PI74ALVCH16374 is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. This device can be used as two 8-bit flip-flops or one 16-bit flip-flop. On the positive transition of the Clock (CLK) input, the Q outputs of the flip-flop take on the logic levels set up at the data (D) inputs. OE can be used to place the eight outputs in either a normal logic state (high or low logic levels) or a highimpedance state. In that state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and the increased drive provide the capability to drive bus lines without need for interface or pullup components. OE does not affect internal operations of the flip-flop. Old data can be retained or new data can be entered while the outputs are in the high-impedance state. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. C1 2 Logic Block Diagram 1OE 1 1CLK 48 Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. 1Q1 1D1 47 1D To Seven Other Channels 24 2OE 2CLK 25 C1 13 2Q1 2D1 36 1D To Seven Other Channels 1 PS8138A 09/03/98 PI74ALVCH16374 16-Bit Edge Triggered D-Type Flip-Flop with 3-State Outputs 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Product Pin Description Pin Name OE CLK Dx Qx GND VCC www.DataSheet4U.com Truth Table(1) Inputs OE L L L H CLK ­ ­ H or L X D H L X X Outputs Q H L Q0 Z Description Output Enable Input (Active LOW) Clock Input (Active HIGH) Data Inputs 3-State Outputs Ground Power Product Pin Configuration Notes: 1. H = High Signal Level L = Low Signal Level X = Irrelevant Z = High Impedance ↑ = LOW to HIGH Transition n = 1,2 1OE 1Q1 1Q2 GND 1Q3 1Q4 VCC 1Q5 1Q6 GND 1Q7 1Q8 2Q1 2Q2 GND 2Q3 2Q4 VCC 2Q5 2Q6 GND 2Q7 2Q8 2OE 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 48 47 46 45 44 1CLK 1D1 1D2 GND 1D3 1D4 VCC 1D5 1D6 GND 1D7 1D8 2D1 2D2 GND 2D3 2D4 VCC 2D5 2D6 GND 2D7 2D8 2CLK 48-PIN V48 A48 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 2 PS8138A 09/03/98 PI74ALVCH16374 16-Bit Edge Triggered D-Type Flip-Flop with 3-State Outputs 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Maximum Ratings (Above which the useful life may be impaired. For user guidelines, not tested.) Storage Temperature ............................................................ –65°C to +150°C Ambient Temperature with Power Applied .......................... –40°C to +85°C Input Voltage Range, VIN .................................................... –0.5V to VCC +0.5V Output Voltage Range, VOUT ............................................. –0.5V to VCC +0.5V DC Input Voltage ................................................................... –0.5V to +5.0V DC Output Current .............................................................................. 100 mA Power Dissipation ................................................................................... 1.0W Note: Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above thos.


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