LH531V00

LH531V00 FEATURES 131,072 words × 8 bit organization Access time: 100 ns (MAX.) Power consumption: Operating: 275 mW (MAX.) Standby: 550 µW (MAX.) Mask-programmable OE1/OE1/DC Fully-static operation TTL-compatible I/O Three-state outputs Single +5 V power supply Packages: 32-pin, 600-mil DIP 32-pin, 525-mil SOP 32-pin, 8 × 20 mm2 TSOP (Type I) DESCRIPTION The LH531V00 is a 1M-bit mask-programmable ROM organized as 131,072 × 8 bits. It is fabricated using silicon-gate CMOS process technology. 32-PIN DIP 32-PIN SOP OE1/OE1/DC A16 A15 A12 A7 A6 A5 A4 A3 A2 A1 A0 D0 D1 D2 GND CMOS 1M (128K × 8) MROM PIN CONNECTIONS TOP VIEW 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 VCC NC NC A14 A13 A8 A9 A11 OE A10 CE D7 D6 D5 D4 D3 531V00-1 Figure 1. Pin Connections for DIP and SOP Packages 32-PIN TSOP (Type I) TOP VIEW A11 A9 A8 A13 A14 NC NC VCC OE1/OE1/DC A16 A15 A12 A7 A6 A5 A4 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 OE A10 CE D7 D6 D5 D4 D3 GND D2 D1 D0 A0 A1 A2 A3 531V00-2 Figure 2. Pin Connections for TSOP Package 1 LH531V00 CMOS 1M MROM A16 A15 A14 A13 2 3 29 28 MEMORY MATRIX (131,072 x 8) A12 4 A9 A8 A7 A6 26 27 5 6 A5 7 A4 8 A3 9 A2 10 A1 11 A0 12 ADDRESS BUFFER A11 25 A10 23 ADDRESS DECODER COLUMN SELECTOR SENSE AMPLIFIER CE 22 CE BUFFER TIMING GENERATOR OUTPUT BUFFER OE 24 OE1/OE1/DC 1 OE BUFFER 32 16 VCC GND NOTE: Pin numbers apply to the 32-p...