24E64 ST24E64 Datasheet

24E64 Datasheet PDF, Equivalent


Part Number

24E64

Description

ST24E64

Manufacture

STMicroelectronics

Total Page 16 Pages
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Download 24E64 Datasheet PDF


24E64
ST24E64
ST25E64
SERIAL EXTENDED ADDRESSING COMPATIBLE
WITH I2C BUS 64K (8K x 8) EEPROM
COMPATIBLE with I2C EXTENDED
ADDRESSING
www.DataSheet4U.coTmWO WIRE SERIAL INTERFACE,
SUPPORTS 400kHz PROTOCOL
1 MILLION ERASE/WRITE CYCLES, OVER
the FULL SUPPLY VOLTAGE RANGE
40 YEARS DATA RETENTION
SINGLE SUPPLY VOLTAGE
– 4.5V to 5.5V for ST24E64 version
– 2.5V to 5.5V for ST25E64 version
WRITE CONTROL FEATURE
BYTE and PAGE WRITE (up to 32 BYTES)
BYTE, RANDOM and SEQUENTIAL READ
MODES
SELF TIMED PROGRAMING CYCLE
AUTOMATIC ADDRESS INCREMENTING
ENHANCED ESD/LATCH UP
PERFORMANCES
PRELIMINARY DATA
8
1
PSDIP8 (B)
0.25mm Frame
8
1
SO8 (M)
200mil Width
Figure 1. Logic Diagram
DESCRIPTION
The ST24/25E64 are 64K bit electrically erasable
programmable memories (EEPROM), organized
as 8 blocks of 1024 x 8 bits. The ST25E64 operates
with a power supply value as low as 2.5V. Both
Plastic Dual-in-Line and Plastic Small Outline pack-
ages are available.
Table 1. Signal Names
E0 - E2
SDA
SCL
WC
VCC
VSS
Chip Enable Inputs
Serial Data Address Input/Output
Serial Clock
Write Control
Supply Voltage
Ground
VCC
3
E0-E2
SCL
WC
ST24E64
ST25E64
SDA
VSS
AI01204B
November 1996
This is preliminary information on a new product now in development or undergoing evaluatio n.Details are subject to change without notice.
1/16

24E64
ST24E64, ST25E64
Figure 2A. DIP Pin Connections
www.DataSheet4U.com
ST24E64
ST25E64
E0 1
E1 2
8 VCC
7 WC
E2 3
6 SCL
VSS 4
5 SDA
AI01205B
Figure 2B. SO Pin Connections
E0
E1
E2
VSS
ST24E64
ST25E64
18
27
36
45
AI01206C
VCC
WC
SCL
SDA
Table 2. Absolute Maximum Ratings (1)
Symbol
Parameter
Value
Unit
TA
TSTG
TLEAD
Ambient Operating Temperature
Storage Temperature
Lead Temperature, Soldering
(SO8)
(PSDIP8)
40 sec
10 sec
–40 to 125
–65 to 150
215
260
°C
°C
°C
VIO Input or Output Voltages
–0.6 to 6.5
V
VCC Supply Voltage
–0.3 to 6.5
V
VESD
Electrostatic Discharge Voltage (Human Body model) (2)
Electrostatic Discharge Voltage (Machine model) (3)
4000
500
V
V
Notes: 1. Except for the rating ”Operating Temperature Range”, stresses above those listed in the Table ”Absolute Maximum Ratings”
may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other
conditions above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum
Rating conditions for extended periods may affect device reliability. Refer also to the SGS-THOMSON SURE Program and
other relevant quality documents.
2. 100pF through 1500; MIL-STD-883C, 3015.7
3. 200pF through 0; EIAJ IC-121 (condition C)
DESCRIPTION (cont’d)
Each memory is compatible with the I2C extended
addressing standard, two wire serial interface
which uses a bi-directional data bus and serial
clock. The ST24/25E64carry a built-in 4 bit, unique
device identification code (1010) corresponding to
the I2C bus definition. The ST24/25E64 behave as
slave devices in the I2C protocol with all memory
operations synchronized by the serial clock. Read
and write operations are initiated by a START
conditiongenerated by the bus master. The START
condition is followed by a stream of 4 bits (identifi-
cation code 1010), 3 bit Chip Enable input to form
a 7 bit Device Select, plus one read/write bit and
terminated by an acknowledge bit.
2/16


Features ST24E64 ST25E64 SERIAL EXTENDED ADDRESSI NG COMPATIBLE WITH I2C BUS 64K (8K x 8) EEPROM PRELIMINARY DATA COMPATIBLE wi th I2C EXTENDED ADDRESSING TWO WIRE SER IAL INTERFACE, www.DataSheet4U.com SUPP ORTS 400kHz PROTOCOL 1 MILLION ERASE/WR ITE CYCLES, OVER the FULL SUPPLY VOLTAG E RANGE 40 YEARS DATA RETENTION SINGLE SUPPLY VOLTAGE – 4.5V to 5.5V for ST2 4E64 version – 2.5V to 5.5V for ST25E 64 version WRITE CONTROL FEATURE BYTE a nd PAGE WRITE (up to 32 BYTES) BYTE, RA NDOM and SEQUENTIAL READ MODES SELF TIM ED PROGRAMING CYCLE AUTOMATIC ADDRESS I NCREMENTING ENHANCED ESD/LATCH UP PERFO RMANCES 8 1 PSDIP8 (B) 0.25mm Frame 8 1 SO8 (M) 200mil Width Figure 1. Logi c Diagram VCC DESCRIPTION The ST24/25 E64 are 64K bit electrically erasable p rogrammable memories (EEPROM), organize d as 8 blocks of 1024 x 8 bits. The ST2 5E64 operates with a power supply value as low as 2.5V. Both Plastic Dual-in-L ine and Plastic Small Outline packages are available. 3 E0-E2 SCL WC ST24E64 ST25E64 SDA Table 1. Signal.
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