24E64

ST24E64 ST25E64 SERIAL EXTENDED ADDRESSING COMPATIBLE WITH I2C BUS 64K (8K x 8) EEPROM PRELIMINARY DATA COMPATIBLE with I2C EXTENDED ADDRESSING TWO WIRE SERIAL INTERFACE, www.DataSheet4U.com SUPPORTS 400kHz PROTOCOL 1 MILLION ERASE/WRITE CYCLES, OVER the FULL SUPPLY VOLTAGE RANGE 40 YEARS DATA RETENTION SINGLE SUPPLY VOLTAGE – 4.5V to 5.5V for ST24E64 version – 2.5V to 5.5V for ST25E64 version WRITE CONTROL FEATURE BYTE and PAGE WRITE (up to 32 BYTES) BYTE, RANDOM and SEQUENTIAL READ MODES SELF TIMED PROGRAMING CYCLE AUTOMATIC ADDRESS INCREMENTING ENHANCED ESD/LATCH UP PERFORMANCES 8 1 PSDIP8 (B) 0.25mm Frame 8 1 SO8 (M) 200mil Width Figure 1. Logic Diagram VCC DESCRIPTION The ST24/25E64 are 64K bit electrically erasable programmable memories (EEPROM), organized as 8 blocks of 1024 x 8 bits. The ST25E64 operates with a power supply value as low as 2.5V. Both Plastic Dual-in-Line and Plastic Small Outline packages are available. 3 E0-E2 SCL WC ST24E64 ST25E64 SDA Table 1. Signal Names E0 - E2 SDA SCL WC VCC VSS Chip Enable Inputs Serial Data Address Input/Output Serial Clock Write Control Supply Voltage Ground VSS AI01204B November 1996 This is preliminary information on a new product now in development or undergoing evaluatio n.Details are subject to change without notice. 1/16 ST24E64, ST25E64 Figure 2A. DIP Pin Connections Figure 2B. SO Pin Connections ST24E64 ST25E64 E0 E1 E2 VSS 1 2 3 4 8 7 6 5 AI01205B ST24E64 ST25E64 VCC WC SCL SDA E0 E1 E2 VSS 1 2 3 4 8...