MN101CF54A

MN101C54A , MN101C54C Type ROM (× 8-bit) RAM (× 8-bit) Package Minimum Instruction Execution Time MN101C54A 32 K 2K 0.1 µ s (at 4.5 V to 5.5 V, 20 MHz) 0.25 µ s (at 2.7 V to 5.5 V, 8 MHz)*1 62.5 µ s (at 2.0 V to 5.5 V, 32 kHz)*1,2 *1 The lower limit for operation guarantee for flash memory built-in type is 4.5 V. *2 The lower limit for operation guarantee for EPROM built-in type is 2.3 V. RESET Watchdog External 0 External 1 External 2 External 3*1 External 4 (key interrupt dedicated) Timer 0 Timer 1 Timer 2 Timer 3 Timer 6 Time base Timer 7 (2 systems) Timer 8 (2 systems) Serial 0 (2 systems) Serial 2 A/D conversion finish *1 LQFP080-P-1414A,TQFP080-P-1212D: Not mounted Timer counter 0 : 8-bit × 1 (square-wave/8-bit PWM output, event count, generation of remote control carrier, simple pulse width measurement) (square-wave/PWM output to large current terminal P50 possible) Clock source ····················· 1/2, 1/4 of system clock frequency; 1/1, 1/4, 1/16, 1/32, 1/64 of OSC oscillation clock frequency; 1/1 of XI oscillation clock frequency; external clock input Interrupt source ················ coincidence with compare register 0 Timer counter 1 : 8-bit × 1 (square-wave output, event count, synchronous output event) Clock source ····················· 1/2, 1/8 of system clock frequency; 1/1, 1/4, 1/16, 1/8192, 1/32768 of OSC oscillation clock frequency; 1/1 of XI oscillation clock frequency; external clock input Interrupt source ··········...