(PDF) KM681000C Datasheet PDF | Samsung semiconductor





KM681000C Datasheet PDF

Part Number KM681000C
Description 128K x8 bit Low Power CMOS Static RAM
Manufacture Samsung semiconductor
Total Page 10 Pages
PDF Download Download KM681000C Datasheet PDF

Features: Datasheet pdf PRELIMINARY KM681000C Family Document Ti tle 128K x8 bit Low Power CMOS Static R AM CMOS SRAM Revision History Revisio n No. 0.0 0.1 History Initial draft Fi rst revision - Seperate read and write at ICC, ICC1 ICC = ICC1 → Read : 15mA , Write : 35mA Finalized - Add 70ns spe ed bin for commercial product and 85ns speed bin for industrial. Revised - Imp roved operating current Add typical val ue. ICC Read : 15mA → 10mA(Remove wri te current) ICC2 : 90mA → 60mA - Spee d bin change Remove 45ns from commercia l part Remove 55ns and 100ns from indus trial part. Draft Date November 22, 19 95 April 15, 1996 Remark Design target Preliminary www.DataSheet4U.com 1.0 September 5, 1996 Final 2.0 Novembe r 5, 1997 Final The attached data she ets are provided by SAMSUNG Electronics . SAMSUNG Electronics CO., LTD. reserve the right to change the specifications and products. SAMSUNG Electronics will answer to your questions about device. If you have any questions, please contact the SAMSUNG branch offices.

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KM681000C datasheet
KM681000C Family
Document Title
128K x8 bit Low Power CMOS Static RAM
Revision History
Revision No.
0.0
History
Initial draft
0.1 First revision
- Seperate read and write at ICC, ICC1
ICC = ICC1 Read : 15mA, Write : 35mA
www.DataSheet4U.com
1.0
Finalized
- Add 70ns speed bin for commercial product and 85ns speed
bin for industrial.
2.0 Revised
- Improved operating current
Add typical value.
ICC Read : 15mA 10mA(Remove write current)
ICC2 : 90mA 60mA
- Speed bin change
Remove 45ns from commercial part
Remove 55ns and 100ns from industrial part.
PRELIMINARY
CMOS SRAM
Draft Date
November 22, 1995
April 15, 1996
Remark
Design target
Preliminary
September 5, 1996
Final
November 5, 1997
Final
The attached data sheets are provided by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right to change the specifications and
products. SAMSUNG Electronics will answer to your questions about device. If you have any questions, please contact the SAMSUNG branch offices.
1 Revision 2.0
November 1997

KM681000C datasheet
KM681000C Family
PRELIMINARY
CMOS SRAM
128K x8 bit Low Power CMOS Static RAM
FEATURES
Process Technology: TFT
Organization: 128K x8
Power Supply Voltage: 4.5~5.5V
Low Data Retention Voltage: 2V(Min)
Three state output and TTL Compatible
Package Type: 32-DIP-600, 32-SOP-525,
32-TSOP1-0820F/R
GENERAL DESCRIPTION
The KM681000C families are fabricated by SAMSUNGs
advanced CMOS process technology. The families support
various operating temperature ranges and have various
package types for user flexibility of system design. The fami-
lies also support low data retention voltage for battery back-
up operation with low data retention current.
PRODUCT FAMILY
www.DataSheet4U.coPmroduct Family Operating Temperature Vcc Range
KM681000CL
KM681000CL-L
KM681000CLI
KM681000CLI-L
Commercial(0~70°C)
Industrial(-40~85°C)
4.5~5.5V
Speed
55/70ns
70ns
Power Dissipation
Standby
(ISB1, Max)
Operating
(ICC2, Max)
50µA
10µA
50µA
15µA
60mA
PKG Type
32-DIP, 32-SOP
32-TSOP1-F/R
32-SOP
32-TSOP1-F/R
PIN DESCRIPTION
FUNCTIONAL BLOCK DIAGRAM
N.C
A16
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O1
I/O2
I/O3
VSS
1 32
2 31
3 30
4 29
5 28
6 27
7 26
8 32-DIP 25
9 32-SOP 24
10 23
11 22
12 21
13 20
14 19
15 18
16 17
A11
A9
A8
VCC A13
WE
A15 CS2
CS2 A15
WE
VCC
N.C
A13 A16
A8
A14
A12
A9 A7
A11
A6
A5
OE A4
A10
CS1
A4
I/O8 A5
I/O7 A6
A7
I/O6 A12
I/O5 A14
A16
I/O4 N.C
VCC
A15
CS2
WE
A13
A8
A9
A11
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
32-TSOP
Type1 - Forward
32 OE
31 A10
30 CS1
29 I/O8
28 I/O7
27 I/O6
26 I/O5
25 I/O4
24 VSS
23 I/O3
22 I/O2
21 I/O1
20 A0
19 A1
18 A2
17 A3
32-TSOP
Type1 - Reverse
17 A3
18 A2
19 A1
20 A0
21 I/O1
22 I/O2
23 I/O3
24 VSS
25 I/O4
26 I/O5
27 I/O6
28 I/O7
29 I/O8
30 CS1
31 A10
32 OE
Name
Function
Name
Function
CS1,CS2 Chip Select Inputs I/O1~I/O8 Data Inputs/Out-
OE Output Enable
Vcc Power
WE Write Enable
Vss Ground
A0~A16 Address Inputs
N.C No Connection
A4
A5
A6
A7
A8
A12
A13
A14
A15
A16
I/O1
I/O8
Clk gen.
Row
select
Data
cont
Data
cont
Precharge circuit.
Memory array
1024 rows
128×8 columns
VCC
VSS
I/O Circuit
Column select
A0 A1 A2 A3 A9 A10 A11
CS1
CS2 Control
WE logic
OE
SAMSUNG ELECTRONICS CO., LTD. reserves the right to change products and specifications without notice.
2 Revision 2.0
November 1997




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