KM681001B

PRELIMINARY KM681001B Document Title 128Kx8 Bit High Speed Static RAM(5V Operating), Evolutionary Pin out. Operated at Commercial and Industrial Temperature Range. CMOS SRAM Revision History Rev . No. Rev. 0.0 Rev. 1.0 History Initial release with Design Target. Release to Preliminary Data Sheet. 1. Replace Design Target to Preliminary. Release to Final Data Sheet. 1. Delete Preliminary. 2. Delete 17ns, L-version and Industrial Temperature Part. 3. Delete Voh1=3.95V. 4. Delete Data Retention Characteristics and Wave form. 5. Relex operating current Speed Previous Now 15ns 130mA 125mA 17ns 120mA 20ns 110mA 123mA Draft Data Feb. 1st, 1997 Jun. 1st, 1997 Remark Design Target Preliminary www.DataSheet4U.comRev. 2.0 Feb. 6th. 1998 Final The attached data sheets are prepared and approved by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right to change the specifications. SAMSUNG Electronics will evaluate and reply to your requests and questions on the parameters of this device. If you have any questions, please contact the SAMSUNG branch office near your office, call or contact Headquarters. Rev 2.0 February 1998 -1- PRELIMINARY KM681001B 128K x 8 Bit High-Speed CMOS Static RAM FEATURES Fast Access Time 15, 20ns(Max.) Low Power Dissipation Standby (TTL) : 20mA(Max.) (CMOS) : 5mA(Max.) Operating KM681001B - 15 : 125mA(Max.) KM681001B - 20 : 123mA(Max.) Single 5.0V±10% Power Supply TTL Compatible Inputs and Outputs Fully Static Operation - No Clock ...