KM681002CL

PRELIMINARY KM681002C/CL, KM681002CI/CLI Document Title 128Kx8 Bit High-Speed CMOS Static RAM(5V Operating). Operated at Commercial and Industrial Temperature Ranges. CMOS SRAM Revision History Rev. No. Rev. 0.0 Rev. 1.0 History Initial release with Preliminary. Release to Final Data Sheet. 1.1. Delete Preliminary. 2.2. Added Data Retention Characteristics. Add 10ns part. Draft Data Aug. 5. 1998 Mar. 3. 1999 Remark Preliminary Final www.DataSheet4U.com Rev. 2.0 Mar. 3. 2000 Final The attached data sheets are prepared and approved by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right to change the specifications. SAMSUNG Electronics will evaluate and reply to your requests and questions on the parameters of this device. If you have any questions, please contact the SAMSUNG branch office near your office, call or contact Headquarters. -1- Revision 2.0 March 2000 PRELIMINARY KM681002C/CL, KM681002CI/CLI FEATURES Fast Access Time 10,12,15,20ns(Max.) Low Power Dissipation Standby (TTL) : 30mA(Max.) (CMOS) : 5mA(Max.) 0.5mA(Max.) L-ver. only Operating KM681002C/CL-10 : 80mA(Max.) KM681002C/CL-12 : 75mA(Max.) KM681002C/CL-15 : 73mA(Max.) KM681002C/CL-20 : 70mA(Max.) Single 5.0V±10% Power Supply TTL Compatible Inputs and Outputs www.DataSheet4U.com I/O Compatible with 3.3V Device Fully Static Operation - No Clock or Refresh required Three State Outputs 2V Minimum Data Retention; L-ver. only Center Power/Ground Pin Configuration Standard ...