NIKO-SEM
N-Channel Logic Level Enhancement Mode Field Effect Transistor
P45N03LTG
TO-220 Lead Free
D
PRODUCT SUMMARY ...
NIKO-SEM
N-Channel Logic Level Enhancement Mode Field Effect
Transistor
P45N03LTG
TO-220 Lead Free
D
PRODUCT SUMMARY V(BR)DSS 25
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RDS(ON) 20m
ID 45A
G S
1. GATE 2. DRAIN 3. SOURCE
ABSOLUTE MAXIMUM RATINGS (TC = 25 °C Unless Otherwise Noted) PARAMETERS/TEST CONDITIONS Gate-Source Voltage Continuous Drain Current Pulsed Drain Current Avalanche Current Avalanche Energy Repetitive Avalanche Energy2 Power Dissipation L = 0.1mH L = 0.05mH TC = 25 °C TC = 100 °C Operating Junction & Storage Temperature Range Lead Temperature ( /16” from case for 10 sec.) THERMAL RESISTANCE RATINGS THERMAL RESISTANCE Junction-to-Case Junction-to-Ambient Case-to-Heatsink
1 2 1 1
SYMBOL VGS
LIMITS ±20 45 28 140 20 140 5.6 65 33 -55 to 150 275
UNITS V
TC = 25 °C TC = 100 °C
ID IDM IAR EAS EAR PD Tj, Tstg TL
A
mJ
W
°C
SYMBOL RθJC RθJA RθCS
TYPICAL
MAXIMUM 3 70
UNITS
°C / W
0.7
Pulse width limited by maximum junction temperature. Duty cycle ≤ 1
ELECTRICAL CHARACTERISTICS (TC = 25 °C, Unless Otherwise Noted) PARAMETER SYMBOL TEST CONDITIONS STATIC Drain-Source Breakdown Voltage Gate Threshold Voltage Gate-Body Leakage Zero Gate Voltage Drain Current V(BR)DSS VGS(th) IGSS IDSS VGS = 0V, ID = 250µA VDS = VGS, ID = 250µA VDS = 0V, VGS = ±20V VDS = 20V, VGS = 0V VDS = 20V, VGS = 0V, TJ = 125 °C 25 0.8 1.2 2.5 ±250 25 250 nA µA V LIMITS UNIT MIN TYP MAX
1
AUG-13-2004
NIKO-SEM
N-Channel Logic Level Enhancement Mode Field Effect
Transistor
P45N03LTG
TO-220 Lead Fre...