74V2T125 BUFFER Datasheet

74V2T125 Datasheet, PDF, Equivalent


Part Number

74V2T125

Description

DUAL BUS BUFFER

Manufacture

STMicroelectronics

Total Page 10 Pages
Datasheet
Download 74V2T125 Datasheet


74V2T125
74V2T125
DUAL BUS BUFFER (3-STATE)
s HIGH SPEED: tPD = 3.8ns (TYP.) at VCC = 5V
s LOW POWER DISSIPATION:
ICC = 1µA(MAX.) at TA=25°C
www.DataSheet4U.csomCOMPATIBLE WITH TTL OUTPUTS:
VIH = 2V (MIN), VIL = 0.8V (MAX)
s POWER DOWN PROTECTION ON INPUTS
AND OUTPUTS
s SYMMETRICAL OUTPUT IMPEDANCE:
|IOH| = IOL = 8mA (MIN)
s BALANCED PROPAGATION DELAYS:
tPLH tPHL
s OPERATING VOLTAGE RANGE:
VCC(OPR) = 4.5V to 5.5V
s IMPROVED LATCH-UP IMMUNITY
SOT23-8L
ORDER CODES
PACKAGE
SOT23-8L
SOT323-8L
PRELIMINARY DATA
SOT323-8L
T&R
74V2T125STR
74V2T125CTR
DESCRIPTION
The 74V2T125 is an advanced high-speed CMOS
DUAL BUS BUFFER fabricated with sub-micron
silicon gate and double-layer metal wiring C2MOS
tecnology.
3-STATE control input nG has to be set HIGH to
place the output into the high impedance state.
Power down protection is provided on all inputs
and outputs and 0 to 7V can be accepted on
inputs with no regard to the supply voltage. This
device can be used to interface 3V to 5V systems
and it is ideal for portable applications like
personal digital assistant, camcorder and all
battery-powered equipment.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them ESD immunity and transient excess voltage.
PIN CONNECTION AND IEC LOGIC SYMBOLS
December 2001
1/10
This is preliminary information on a new product now in development are or undergoing evaluation. Details subject to change without notice.

74V2T125
74V2T125
INPUT EQUIVALENT CIRCUIT
PIN DESCRIPTION
PIN No
1, 7
2, 5
3, 6
4
8
SYMBOL
1G, 2G
1A, 2A
2Y, 1Y
GND
VCC
NAME AND FUNCTION
Output Enable Inputs
Data Inputs
Data Outputs
Ground (0V)
Positive Supply Voltage
www.DataSheet4U.com
TRUTH TABLE
A
X
L
H
X: "H" or "L"
Z: High Impedance
G
H
L
L
Y
Z
L
H
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Value
Unit
VCC Supply Voltage
-0.5 to +7.0
V
VI DC Input Voltage
-0.5 to +7.0
V
VO DC Output Voltage
-0.5 to VCC + 0.5
V
IIK DC Input Diode Current
20
mA
IOK DC Output Diode Current
20
mA
IO DC Output Current
± 25
mA
ICC or IGND DC VCC or Ground Current
± 50
mA
Tstg Storage Temperature
-65 to +150
°C
TL Lead Temperature (10 sec)
260 °C
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied.
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
VCC Supply Voltage
VI Input Voltage
VO Output Voltage
Top Operating Temperature
dt/dv Input Rise and Fall Time (note 1) (VCC = 5.0 ± 0.5V)
1) VIN from 0.8V to 2V
Value
4.5 to 5.5
0 to 5.5
0 to VCC
-55 to 125
0 to 20
Unit
V
V
V
°C
ns/V
2/10


Features 74V2T125 DUAL BUS BUFFER (3-STATE) PRELI MINARY DATA HIGH SPEED: tPD = 3.8ns (T YP.) at VCC = 5V LOW POWER DISSIPATION: ICC = 1µA(MAX.) at TA=25°C www.DataS heet4U.com s COMPATIBLE WITH TTL OUTPUT S: VIH = 2V (MIN), VIL = 0.8V (MAX) s P OWER DOWN PROTECTION ON INPUTS AND OUTP UTS s SYMMETRICAL OUTPUT IMPEDANCE: |IO H| = IOL = 8mA (MIN) s BALANCED PROPAGA TION DELAYS: tPLH ≅ tPHL s OPERATING VOLTAGE RANGE: VCC(OPR) = 4.5V to 5.5V s IMPROVED LATCH-UP IMMUNITY s s SOT23 -8L SOT323-8L ORDER CODES PACKAGE SOT 23-8L SOT323-8L T&R 74V2T125STR 74V2T12 5CTR DESCRIPTION The 74V2T125 is an ad vanced high-speed CMOS DUAL BUS BUFFER fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS te cnology. 3-STATE control input nG has t o be set HIGH to place the output into the high impedance state. Power down pr otection is provided on all inputs and outputs and 0 to 7V can be accepted on inputs with no regard to the supply vo ltage. This device can be used to interface 3V to 5V systems and it.
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