74V2T132 GATE Datasheet

74V2T132 Datasheet, PDF, Equivalent


Part Number

74V2T132

Description

DUAL 2-INPUT SHMITT TRIGGER NAND GATE

Manufacture

STMicroelectronics

Total Page 7 Pages
Datasheet
Download 74V2T132 Datasheet


74V2T132
74V2T132
DUAL 2-INPUT SHMITT TRIGGER NAND GATE
s HIGH SPEED: tPD = 3.7 ns (TYP.) at VCC = 5V
s LOW POWER DISSIPATION:
ICC = 1 µA (MAX.) at TA = 25°C
www.DataSheet4U.csomTYPICAL HYSTERESIS: 0.8V at VCC = 4.5V
s SYMMETRICAL OUTPUT IMPEDANCE:
|IOH| = IOL = 8 mA (MIN)
s BALANCED PROPAGATION DELAYS:
tPLH tPHL
s OPERATING VOLTAGE RANGE:
VCC(OPR) = 4.5V to 5.5V
s IMPROVED LATCH-UP IMMUNITY
DESCRIPTION
The 74V2T132 is an advanced high-speed CMOS
SINGLE 2-INPUT NAND GATE fabricated with
sub-micron silicon gate and double-layer metal
wiring C2MOS technology.
Pin configuration and function are the same as
those of the 74V2T00 but the 74V2T132 has
hysteresis.
SOT23-8L
ORDER CODES
PACKAGE
SOT23-8L
T&R
74V2T132STR
The internal circuit is composed of 3 stages
including buffer output, which provide high noise
immunity and stable output.
Power down protection is provided on all inputs
and 0 to 7V can be accepted on inputs with no
regard to the supply voltage. This device can be
used to interface 5V to 3V.
PIN CONNECTION AND IEC LOGIC SYMBOLS
June 2003
1/7

74V2T132
74V2T132
INPUT EQUIVALENT CIRCUIT
www.DataSheet4U.com
PIN DESCRIPTION
PIN No
1, 5
2, 6
7, 3
4
8
SYMBOL
1A, 2A
1B, 2B
1Y, 2Y
GND
VCC
NAME QND FUNCTION
Data Input
Data Input
Data Output
Ground (0V)
Positive Supply Voltage
TRUTH TABLE
A
L
L
H
H
B
L
H
L
H
Y
H
H
H
L
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Value
Unit
VCC Supply Voltage
-0.5 to +7.0
V
VI DC Input Voltage
-0.5 to +7.0
V
VO DC Output Voltage (see note 1)
-0.5 to +7.0
V
VO DC Output Voltage (see note 2)
-0.5 to VCC + 0.5
V
IIK DC Input Diode Current
- 20 mA
IOK DC Output Diode Current
± 20
mA
IO DC Output Current
± 25
mA
ICC or IGND DC VCC or Ground Current
± 50
mA
Tstg Storage Temperature
-65 to +150
°C
TL Lead Temperature (10 sec)
300 °C
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied
1) VCC = 0V
2) High or Low State
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
VCC Supply Voltage
VI Input Voltage
VO Output Voltage (see note 1)
VO Output Voltage (see note 2)
Top Operating Temperature
1) VCC = 0V
2) High or Low State
Value
4.5 to 5.5
0 to 5.5
0 to 5.5
0 to VCC
-55 to 125
Unit
V
V
V
V
°C
2/7


Features 74V2T132 DUAL 2-INPUT SHMITT TRIGGER NAN D GATE HIGH SPEED: tPD = 3.7 ns (TYP.) at VCC = 5V LOW POWER DISSIPATION: ICC = 1 µA (MAX.) at TA = 25°C www.DataSh eet4U.com s TYPICAL HYSTERESIS: 0.8V at VCC = 4.5V s SYMMETRICAL OUTPUT IMPEDA NCE: |IOH| = IOL = 8 mA (MIN) s BALANCE D PROPAGATION DELAYS: tPLH ≅ tPHL s O PERATING VOLTAGE RANGE: VCC(OPR) = 4.5V to 5.5V s IMPROVED LATCH-UP IMMUNITY s s SOT23-8L ORDER CODES PACKAGE SOT23 -8L T&R 74V2T132STR DESCRIPTION The 74 V2T132 is an advanced high-speed CMOS S INGLE 2-INPUT NAND GATE fabricated with sub-micron silicon gate and double-lay er metal wiring C2MOS technology. Pin c onfiguration and function are the same as those of the 74V2T00 but the 74V2T13 2 has hysteresis. The internal circuit is composed of 3 stages including buff er output, which provide high noise imm unity and stable output. Power down pro tection is provided on all inputs and 0 to 7V can be accepted on inputs with n o regard to the supply voltage. This device can be used to interfac.
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